Virtualization Technology; Intel Anti-Theft Technology; System Management Bus; Intel 3420 Chipset Manageability Functions - Dell PowerEdge T310 Technical Manual

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Table 14.
Feature
TCO Timer
Processor Present Indicator
ECC Error Reporting
Function Disable
Intruder Detect
8.12 Enhanced Intel
The Intel 3420 chipset supports hardware assist for I/O virtualization using Intel Virtualization
Technology for Directed I/O (Intel VT-d). Intel VT-d Technology consists of technology components
that support the virtualization of platforms based on Intel Architecture Processors. Intel VT-d
Technology enables multiple operating systems and applications to run in independent partitions. A
partition behaves like a virtual machine and provides isolation and protection across partitions. Each
partition is allocated its own subset of host physical memory.

8.13 Intel Anti-Theft Technology

The Intel 3420 chipset introduces a new hardware-based security technology, Intel Anti-Theft
Technology, that encrypts data stored on any SATA-compliant hard drive in AHCI Mode. This feature
gives the end-user the ability to restrict access to the hard drive data by unknown parties. This
technology can be used alone or can be combined with software encryption applications to add
protection against data theft. The technology requires a correctly configured system, including an
appropriate processor, Intel Management Engine firmware, and system BIOS support.

8.14 System Management Bus

The Intel 3420 chipset contains a system management bus (SMBus 2.0) host interface that allows the
processor to communicate with SMBus slaves. This interface is compatible with most I
2
Special I C commands are implemented.
The chipset's SMBus host controller provides a mechanism for the processor to initiate
communications with SMBus peripherals (slaves). Also, the chipset supports slave functionality,
including the Host Notify protocol. Hence, the host controller supports eight command protocols of
the SMBus interface (see System Management Bus (SMBus) Specification, Version 2.0): Quick
PowerEdge T310 Technical Guide

Intel 3420 Chipset Manageability Functions

Description
The chipset's integrated programmable TCO timer is used to detect
system locks. The first expiration of the timer generates an SMI# that
the system can use to recover from a software lock. The second
expiration of the timer causes a system reset to recover from a
hardware lock.
The chipset looks for the processor to fetch the first instruction after
reset. If the processor does not fetch the first instruction, the chipset
will reboot the system.
When detecting an ECC error, the host controller has the ability to
send one of several messages to the chipset. The host controller can
instruct the chipset to generate either an SMI#, NMI, SERR#, or TCO
interrupt.
The chipset provides the ability to disable the following integrated
functions: LAN, USB, LPC, Intel HD Audio, SATA, PCI Express or SMBus.
Once disabled, these functions no longer decode I/O, memory, or PCI
configuration space. Also, no interrupts or power management events
are generated from the disabled functions.
The chipset provides an input signal (INTRUDER#) that can be attached
to a switch that is activated by the system case being opened. The
chipset can be programmed to generate an SMI# or TCO interrupt due
to an active INTRUDER# signal.
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Virtualization Technology

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C devices.
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