Denon AVR-5803 Service Manual page 35

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3 7 63 1515 0
PCM1738 (IC103, 203, 303, 403)
RST 1
ZEROL 2
ZEROR 3
LRCK 4
5
DATA
6
BCK
TOP VIEW
SCKI 7
8
DGND
9
VDD
SCKO 10
11
MDO
12
MDI
MC 13
14
CS
Pin Assignments
Pin
Pin Name
No.
1 RST
2 ZEROL
3 ZEROR
4 LRCK
5 DATA
6 BCK
7 SCKI
8 DGND
TE
L 13942296513 9 V
DD
10 SCKO
11 MDO
12 MDI
13 MC
14 CS
15 MUTE
16 I R−
OUT
17 I R+
OUT
18 AGND1
19 V 1
COM
20 V 2
COM
21 I
REF
22 V 3
COM
23 V 1
CC
24 V 2
CC
25 I L+
OUT
26 I L−
OUT
27 AGND2
28 V 3
CC
NOTES:
(1) Schmitt trigger input, 5V tolerant.
(2) Tristate output.
MX29F400TTC (IC712)
A15
1
A14
A13
A12
A11
A10
A9
www
A8
NC
NC
WE
RESET
NC
NC
RY/BY
NC
.
A17
A7
A6
A5
A4
A3
A2
A1
24
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LRCK
28 V 3
CC
DATA
BCK
27 AGND2
26 L L-
OUT
25 L L+
OUT
RST
24
V 2
CC
MUTE
23
V 1
CC
CS
22 V 3
COM MC
MDI
21
I
REF
20 MDO
V 2
COM
19 V 1
COM
18
AGND1
17
L R+
OUT
16 L R-
OUT
15
MUTE
Type
IN Reset (1)
OUT Zero Flag for L-channel
OUT Zero Flag for R-channel
IN Left and Right Clock(fs). Input for Normal operation. WDCK clock input in External DF mode. Connected to GND in
DSD mode. (1)
IN Serial Audio Data Input for Normal operation. L-channel audio data input for External DF and DSD modes.
IN Bit Clock Input. Connected GND for DSD mode.
IN System Clock Input. BCK(64fs) clock input for DSD mode

Digital Ground

Digital Supply, +3.3V
OUT System Clock Output
OUT Serial data output for function control register
IN Serial data input for function control register
IN Shift Clock for function control register
IN Mode control chip select and latch signal
IN Analog output mute control for normal operation R-channel audio data input for external DF mode and DSD mode.
OUT R-channel Analog Current Output−
OUT R-channel Analog Current Output+

Analog Ground

Internal bias de-coupling pin

Common voltage for I/V

Output current reference bias pin. Connect 16k register to GND

Internal bias de-coupling pin

Analog Supply, +5.0V

Analog Supply, +5.0V
OUT L-channel Analog Current Output+
OUT L-channel Analog Current Output−

Analog Ground

Analog Power Supply, +5.0V
48 A16
BYTE
GND
Q15A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
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Vcc
TOP VIEW y
Q11
Q3
Q10
Q2
i
Q9
Q1
Q8
Q0
OE
GND
CE
25 A0
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2 9
8
Current
Input
Segment
DAC
I/F
Digital Advanced
Bias
Filter Segment
&
& DAC
Vref
Function
Control Modulator
Function
Control
Current
I/F Segment
DAC
System
Clock
System
Clock
ZERO
Manager
Power Supply
Drtect
Function
(1)
Q Q
3 6 7 1 3
(2)
(1)
(1)
(1)
M29W160DB (IC805, 905)
A15
1
A14
A13
A12
A11
A10
A9
A8
A19
NC
W
RP
NC
NC
RB
A18
.
A17
A7
A6
A5
A4
A3
A2
A1
24
AVR-5803/AVC-A1SR
9 4 2 8
L L+
OUT
L L-
OUT
V 2
COM
I/V & Filter
I
REF
V 1
COM
V 3
COM
I/V & Filter
L R+
OUT
L R-
OUT
1 5 0 5 8 2 9 9 4
48
m
co
TOP VIEW
25
9 9
2 8 9 9
A16
BYTE
Vss
DQ15A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
Vcc
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
G
Vss
E
A0
35