Schematic Diagram - Sanyo LED-22XR10F Service Manual

A B
1
+3.3V
N105
AT24LC32A/SN
R155
1 8
10K
A0 Vcc
2 7 R154 33 E2PWP-
A1 WP
3 6 R153 33 SCL
A2 SCL
4 5 R152 33 SDA
GND SDA
C172 +3.3V-S
100n
Vcc
R131
GND-D N102
APX810-29SAG-7
RESET
+3.3V +3.3V C153
100n
C154
N106
GND
CAT24C04WI
R156 R159
1 8
10K 10K
NC1 Vcc
2 7
GND-D
A1 WP
3 6 R158 33 SCL
A2 SCL
4 5 R157 33 SDA
Vss SDA
C173 R160
100n 0
2
GND-D
HDMI1-RXC- 1
003:A2 HDMI1-RXC- B_RXCN
HDMI1-RXC+ 2
003:A2 HDMI1-RXC+
B_RXCP
HDMI1-RX0- 3
003:A2 HDMI1-RX0- B_RX0N
HDMI1-RX0+ 4
003:A2 HDMI1-RX0+
B_RX0P
HDMI1-HP- 5
003:B2 HDMI1-HP-
HOTPLUGB
6
HDMI1-RX1-
003:A1 HDMI1-RX1- B_RX1N
HDMI1-RX1+ 7
003:A1 HDMI1-RX1+
B_RX1P
8
+3.3V-DVI
AVDD_338
HDMI1-RX2- 9
003:A1 HDMI1-RX2- RXB2N
HDMI1-RX2+ 10
003:A1 HDMI1-RX2+
RXB2P
11
RXACKN
12
RXACKP
13
RXA0N
14
RXA0P
15
+3.3V-ADC
AVDD_33_15
16
RXA1N
17
RXA1P
18
RXA2N
19
RXA2P
20
1% HOTPLUGA
R103 390 21
+3.3V-DVI
REXT
C133 100n 22
VCLAMP
C134 100n 23
3
REFP
C135 100n 24
REFM
VGA-B_IN 25
003:A4 VGA-B_IN BIN1
VGA-SOG_IN 26
GND-D
003:A4 VGA-SOG_IN
SOGIN1
VGA-G_IN 27
003:A4 VGA-G_IN GIN1P
VGA-R_IN 28
003:A4 VGA-R_IN RIN1P
R104 47 C136 47n 29
BIN0M
YPBPR-PB_IN 30
003:D3 YPBPR-PB_IN BIN0P
R105 47 C137 47n 31
GINM
YPBPR-Y_IN 32
003:D2 YPBPR-Y_IN
GIN0P
YPBPR-SOG_IN 33
003:D2 YPBPR-SOG_IN SOGIN0
R106 47 C138 47n 34
RIN0M
YPBPR-PR_IN 35
003:D3 YPBPR-PR_IN RIN0P
36
GND-D
+3.3V-ADC AVDD_33_36
37
BIN2P
38
GIN2P
39
SOGIN2
40
RIN2P
41
CVBS6P
42
CVBS5P
43
CVBS4P
44
CVBS3P
45
CVBS2P
CVBS1_IN 46
003:D2 CVBS1_IN CVBS1P
R107 47 C139 47n 47
VCOM1
ATV-CVBS+ 48
4 002:A3 ATV-CVBS+
CVBS0
ATV-CVBS- 49
GND-D
002:A3 ATV-CVBS- VCOM0
50
+3.3V-ADC
AVDD_33_50
51
CVBSOUT1
CVBS_OUT 52
003:G2 CVBS_OUT
CVBSOUT0
C140 10u 53
TAGC
C141 100n 54
VR27
ATV-SIF+ 55
002:A2 ATV-SIF+
SIF0P
ATV-SIF- 56
GND-D
002:A3 ATV-SIF-
SIF0M
57
VIFM
58
VIFP
59
AVSS_VIF
60
+3.3V-VIF AVDD_VIF
61
+1.2V-VDDC
VDDC_61
62
AUVRM
63
AUOUTL1
64
AUOUTR1
5
C143 100n
C144 10u
L110
C145 100n
BG1608B121
C146 10u
GND-D
003:G4 CVBS-LOUT
003:G3 CVBS-ROUT
6
C
E2PWP-
G101
12MHz
R128
1M R127 R125
R130
10K 10K
10K
SDA
C152 C151
SCL
33p 33p
10K
1n
U S B
x 1
P M S A R P M -
x 4 S P I
U A R T I 2 S - O & I
& I 2 C - M
H D M I - i n x 2
N101
R G B - i n x 3
MSD209GL-LF
C V B S - i n x 7
( i n c l . S - v i d e o )
C V B S - O x 2
S I F x 1
V I F x 1 ( N C )
A U D I O ,
I 2 C - S H D M I - i n x 1
L i n x 5 , L o u t x 3
D D C x 1
D D C x 2
C142
100n
HPAMP-RIN 003:D3
HPAMP-LIN 003:D4
R109 C147 R111 C148 C149 R113 C150 R115
13K 22n 13K 22n 22n 13K 22n 13K
GND-D GND-D
D E
192
GND
191 MCLK-
MCLKZ
190 MCLK+
D D R 2 x 1 6 MCLK
189 MDATA[5]
- A d d r , C L K
MDATA[5]
188 MDATA[2]
MDATA[2]
187
MDATA[0]
MDATA[0]
186 MDATA[7]
MDATA[7]
185
+1.8V-DDR2
AVDD_DDR_185
184 MDATA[13]
MDATA[13]
183 MDATA[10]
MDATA[10]
182 MDATA[8]
MDATA[8]
181 MDATA[15]
MDATA[15]
180
+1.8V-DDR2
AVDD_DDR_180
179
MUDQS-
DDR2_DQSB[1]
178 MUDQS+
D D R 2 x 1 6 DDR2_DQS[1]
177
+3.3V-VDD
VDDP_177
176
- D a t a AVDD_DDR_176 +1.8V-DDR2
175 MLDQS-
DDR2_DQSB[0]
174 MLDQS+
DDR2_DQS[0]
173 MLDM
DDR2_DQM[0]
172 MUDM
DDR2_DQM[1]
171
AVDD_DDR_171 +1.8V-DDR2
170 MDATA[14]
MADTA[14]
169 MDATA[9]
MADTA[9]
168
MDATA[12]
MADTA[12]
167 MDATA[11]
MADTA[11]
166
AVDD_DDR_166 +1.8V-DDR2
165 MDATA[6]
MADTA[6]
164 MDATA[1]
MADTA[1]
163 MDATA[3]
MADTA[3]
162 MDATA[4]
MADTA[4]
161
+1.2V-VDDC
VDDC_161
160
TSCLK
TS1CLK TSCLK
159 TSSYNC
TSSYNC
S e r i a l T S TS1SYNC
158 TSVALID
TS1VALID TSVALID
157 TSDATA
TS1DATA TSDATA
156
GPIO105
155
VDDP_155 +3.3V-VDD
154
GPIO104
153 LED
LED
GPIO101
152
GPIO100
151 AMP-STB
E t h e r n e t
AMP-STB
GPIO95
150 BL_SW-
GPIO94 BL_SW-
149 SPI_WP-
GPIO93
148
GPIO92
147 HP-DCT-
GPIO89 HP-DCT-
146 HP-MUTE-
HP-MUTE- 003:D3
GPIO153
145
GPIO152_I2S_OUT_SD3
144 DM-RST-
DM-RST-
GPIO151_I2S_OUT_SD2
143 AMP-RST-
GPIO150_I2S_OUT_MUTE AMP-RST- 004:F4
142
VDDC_142 +1.2V-VDDC
141
+3.3V-LPLL
AVDD_LPLL
140 R123 33
LVB0M RXO0-
139
RXO0+
LVB0P
138
L V D S X 2
RXO1-
LVB1M
137
VB1P RXO1+
( 1 0 b i t s ) 136 R122 33
RXO2-
LVB2M
135
RXO2+
LVB2P
134
RXOC-
LVBCKM
133
U S B
RXOC+
LVBCKP
132 R121 33
X 1 S P I LVB3M RXO3-
131
RXO3+
LVB3P
130
RXO4-
LVB4M
129
LVB4P RXO4+
GND-D
+3.3V
R134
N103
10K
R132
EN25Q64-104HIP
33
SCS- 1
CS VCC
SDO 2
DO/DQ1 NC/DQ3
SPI_WP- R133 33 SWP- 3
WP/DQ2 CLK
4
C156 VSS DI/DQ0
1n
F G
MCKE R137 56 M_CKE M_ADR[0] M8
M3
MADR[3] M_ADR[3] M_ADR[1]
MADR[7] M_ADR[7] M_ADR[2] M7
MADR[12] M_ADR[12] M_ADR[3] N2
MADR[9] R138 56 M_ADR[9] M_ADR[4] N8
MADR[5] M_ADR[5] M_ADR[5] N3
MADR[10] M_ADR[10] M_ADR[6] N7
MADR[1] M_ADR[1] M_ADR[7] P2
MBA[0] R139 56 M_BA[0] M_ADR[8] P8
MBA[1] M_BA[1] M_ADR[9] P3
MBA[2] M_BA[2] M_ADR[10] M2
MWE- M_WE- M_ADR[11] P7
MADR[11] R140 56 M_ADR[11] M_ADR[12] R2
MADR[8] M_ADR[8]
MADR[6] M_ADR[6] M_CLK+ J8
MADR[4] M_ADR[4] M_CLK- K8
MADR[2] M_ADR[2] M_CKE K2
R141 56
MADR[0] M_ADR[0]
MCAS- M_CAS- M_BA[0] L2
MRAS- M_RAS- M_BA[1] L3
MODT R142 56 M_DOT M_BA[2] L1
R143 22 M_CLK-
MCLK- M_RAS- K7
R144
MCLK+ M_CAS- L7
150
M_CLK+ M_WE- K3
L8
GND-D
MDATA[5] R145 22 M_DATA[5] A1
+1.8V-DDR2
MDATA[2] M_DATA[2] E1
MDATA[0] M_DATA[0] J9
MDATA[7] M_DATA[7] M9
MDATA[13] R146 22 M_DATA[13] R1
MDATA[10] M_DATA[10] A9
MDATA[8] M_DATA[8] C1
MDATA[15] M_DATA[15] C3
R147 22 C7
MUDQS- M_UDQS- C9
MUDQS+ M_UDQS+ E9
G1
R148 22 G3
MLDQS- M_LDQS- G7
MLDQS+ M_LDQS+ G9
R149 22 J1
MLDM M_LDM
002:D2
MUDM M_UDM J2
002:D2 M_VREF
002:D2
002:D2
GND-D
MDATA[14] R150 22 M_DATA[14]
+1.8V-DDR2
MDATA[9] M_DATA[9]
MDATA[12] M_DATA[12]
004:C2
MDATA[11] M_DATA[11]
C157 C158 C159
MDATA[6] R151 22 M_DATA[6]
004:E3 100n 100n 100n
MDATA[1] M_DATA[1]
004:B1
MDATA[3] M_DATA[3]
MDATA[4] M_DATA[4]
003:E4
+1.2V-VDDC +1.8V-DDR2
002:D3
C101 C102 C103 C104 C105 C106 C107 C108 C109
100n 100n 100n 100n 100n 100n 100n 100n 100n
004:D4
004:D4
GND-D GND-D
004:D4
004:D4
004:D4
L101 +3.3V-AUSDM L102 +3.3V-MEMPLL L103 +3.3V-LPLL
004:D4 BG1608B121 BG1608B121 BG1608B121
004:D4 +3.3V +3.3V +3.3V
004:D4
C116 C117 C118
004:D4 100n 1u 100n
004:D4
004:D4
GND-D GND-D
004:D4
L105 +3.3V-VIF L106 +3.3V-USB
BG1608B121 BG1608B121
+3.3V +3.3V
C124 C125
100n 100n
GND-D GND-D
L107 +3.3V-ADC L108 +3.3V-DVI
BG1608B121 BG1608B121
+3.3V-S +3.3V-S +3.3V-S
C126 C127 C128 C129 C130
100n 100n 100n 100n 100n
GND-D GND-D
8
+3.3V
7
6 SCLK
5 SDI
C155
100n
GND-D
DRAWN BY
APPROVED BY
H
N 1 0 4
K 4 T 1 G 1 6 4 Q E - H C F 7
G8 M_DATA[0]
A0 DQ0
G2 M_DATA[1]
A1 DQ1
H7 M_DATA[2]
A2 DQ2
H3 M_DATA[3]
A3 DQ3
H1 M_DATA[4]
A4 DQ4
H9 M_DATA[5]
A5 DQ5
F1 M_DATA[6]
A6 DQ6
F9 M_DATA[7]
A7 DQ7
C8 M_DATA[8]
A8 DQ8
C2
M_DATA[9]
A9 DQ9
D7 M_DATA[10]
A10 DQ10
D3 M_DATA[11]
A11 DQ11
D1 M_DATA[12]
A12 DQ12
D9 M_DATA[13]
DQ13
B1 M_DATA[14]
CK DQ14
B9 M_DATA[15]
CK DQ15
CKE
F7 M_LDQS+
LDQS
E8 M_LDQS-
BA0 LDQS
B7 M_UDQS+
BA1 UDQS
A8 M_UDQS-
BA2 UDQS
F3 M_LDM
RAS LDM
B3 M_UDM
CAS UDM
K9 M_DOT
WE ODT
CS
A3
VSS1
E3
VDD1 VSS2
J3
VDD2 VSS3
N1
VDD3 VSS4
P9
VDD4 VSS5
A7
VSSQ1
VDD5
B2
VDDQ1 VSSQ2
B8
VDDQ2 VSSQ3
D2
VDDQ3 VSSQ4
D8
VDDQ4 VSSQ5
E7
VDDQ5 VSSQ6
F2
VDDQ6 VSSQ7
F8
VDDQ7 VSSQ8
H2
VDDQ8 VSSQ9
H8
VDDQ9 VSSQ10 +1.8V-DDR2
VDDQ10
J7
VSSDL
R135
VDDL
M_VREF
1K
1%
VREF
R136
C170 C171
1K
1n 100n
1%
GND-D
GND-D
C160 C161 C162 C163 C164 C165 C166 C167 C168 C169
100n 100n 100n 100n 100n 100n 100n 100n 100n 100n
GND-D
MVREF
R101
1K
+1.8V-DDR2
1% R102
C110 C111 C112 C113 C114 C115
1K
100n 100n 100n 100n 1n 100n
1%
GND-D GND-D
L104 +3.3V-VDD
BG1608B121
+3.3V
C119 C120 C121 C122 C123
100n 100n 100n 100n 100n
GND-D GND-D
L109 +3.3V-MPLL
BG1608B121
C131 C132
1u 100n
GND-D
TITLE: DWG NO.
Core & Memory 9222KH5101DL
REV. A1.0
Sheet 1 to 6
XOCECO
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.