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DVDR3425H/93, DVDR3435H/93 Main Board Electrical Diagram:TERM AT ES& DDR & VREF/VT
TITLE: TERM AT E5&DDR&VREF/VT BOARD
D
TERMINATION
AT E5.1
E5_SDRAM_DQ[31..0]
RP20 51/RP
E5_SDRAM_DQ0
8
1
SDRAM_DQ0
E5_SDRAM_DQ1
SDRAM_DQ1
7
2
E5_SDRAM_DQ2
SDRAM_DQ2
6
3
E5_SDRAM_DQ3
SDRAM_DQ3
5
4
RP26 51/RP
E5_SDRAM_DQ4
SDRAM_DQ4
1
8
E5_SDRAM_DQ5
SDRAM_DQ5
2
7
E5_SDRAM_DQ6
3
6
SDRAM_DQ6
E5_SDRAM_DQ7
SDRAM_DQ7
4
5
RP28 51/RP
E5_SDRAM_DQ8
8
1
SDRAM_DQ8
E5_SDRAM_DQ9
SDRAM_DQ9
7
2
E5_SDRAM_DQ10
SDRAM_DQ10
6
3
E5_SDRAM_DQ11
SDRAM_DQ11
5
4
RP21 51/RP
E5_SDRAM_DQ12
SDRAM_DQ12
8
1
E5_SDRAM_DQ13
SDRAM_DQ13
7
2
E5_SDRAM_DQ14
6
3
SDRAM_DQ14
E5_SDRAM_DQ15
SDRAM_DQ15
C
5
4
RP22 51/RP
E5_SDRAM_DQ16
8
1
SDRAM_DQ16
E5_SDRAM_DQ17
SDRAM_DQ17
7
2
E5_SDRAM_DQ18
SDRAM_DQ18
6
3
E5_SDRAM_DQ19
SDRAM_DQ19
5
4
RP23 51/RP
E5_SDRAM_DQ20
SDRAM_DQ20
1
8
E5_SDRAM_DQ21
SDRAM_DQ21
2
7
E5_SDRAM_DQ22
3
6
SDRAM_DQ22
E5_SDRAM_DQ23
SDRAM_DQ23
4
5
RP24 51/RP
E5_SDRAM_DQ27
5
4
SDRAM_DQ27
E5_SDRAM_DQ26
SDRAM_DQ26
6
3
E5_SDRAM_DQ25
SDRAM_DQ25
7
2
E5_SDRAM_DQ24
SDRAM_DQ24
8
1
RP32 51/RP
E5_SDRAM_DQ31
SDRAM_DQ31
1
8
E5_SDRAM_DQ29
SDRAM_DQ29
2
7
E5_SDRAM_DQ30
3
6
SDRAM_DQ30
E5_SDRAM_DQ28
SDRAM_DQ28
4
5
RP35 22/RP
E5_SDRAM_DQM0
SDRAM_DQM0
1
8
E5_SDRAM_DQM1
SDRAM_DQM1
2
7
E5_SDRAM_DQM2
SDRAM_DQM2
3
6
E5_SDRAM_DQM3
4
5
SDRAM_DQM3
RP47 22/RP
E5_SDRAM_A1
SDRAM_A1
8
1
E5_SDRAM_A6
SDRAM_A6
7
2
B
E5_SDRAM_A3
SDRAM_A3
6
3
E5_SDRAM_A15
5
4
SDRAM_A15
RP43 22/RP
E5_SDRAM_A8
SDRAM_A8
1
8
E5_SDRAM_A0
2
7
SDRAM_A0
E5_SDRAM_A4
SDRAM_A4
3
6
E5_SDRAM_A2
SDRAM_A2
4
5
RP44 22/RP
E5_SDRAM_A7
SDRAM_A7
8
1
E5_SDRAM_A14
SDRAM_A14
7
2
E5_SDRAM_A9
SDRAM_A9
6
3
E5_SDRAM_A12
5
4
SDRAM_A12
RP45 22/RP
1
8
E5_SDRAM_A11
2
7
SDRAM_A11
E5_SDRAM_A10
3
6
SDRAM_A10
E5_SDRAM_A5
SDRAM_A5
4
5
E5_SDRAM_DQS0
R5
51
SDRAM_DQS0
E5_SDRAM_DQS1
R6
51
SDRAM_DQS1
E5_SDRAM_DQS2
R8
51
SDRAM_DQS2
E5_SDRAM_DQS3
R10
51
SDRAM_DQS3
E5_SDRAM_CLK0
R13
22
SDRAM_CLK0
E5_SDRAM_CLK1
R14
22
SDRAM_CLK1
E5_SDRAM_CLK#0
R16
22
SDRAM_CLK#0
E5_SDRAM_CLK#1
R18
22
SDRAM_CLK#1
RP48
22/RP
E5_SDRAM_RAS#
SDRAM_RAS#
1
8
E5_SDRAM_CLKE
2
7
SDRAM_CLKE
A
E5_SDRAM_CAS#
3
6
SDRAM_CAS#
E5_SDRAM_WE#
SDRAM_WE#
4
5
E5_SDRAM_CS0
R27
22
SDRAM_CS0
5
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The VTT side of the terminaton resistors should be placed
on a wide VTT island on the surface layer. The island is
located at each end of the bus, so it does not interfere
with the signal routing.
SSTL2_VDD
SDRAM_DQ[31..0]
C111
C112
C290
0.1UF
0.1UF
0.01UF
VREF
VREF
C115
C116
C292
0.1UF
0.1UF
0.01UF
GND_SSTL2
SSTL2_VDD
C119
C120
C294
C295
C296
C297
0.1UF
0.1UF
0.01UF
0.01UF
0.1UF
0.1UF
C123
C124
C300
C301
C302
C303
0.1UF
0.1UF
0.01UF
0.01UF
0.1UF
0.1UF
SSTL2_VDD
C279
C280
C281
C282
C129
C130
C319
C320
C321
0.1UF
0.1UF
0.01UF
0.01UF
0.1UF
0.1UF
1000PF
1000PF
1000PF
C284
C285
C286
C287
C135
C136
C324
C325
C326
0.1UF
0.1UF
0.01UF
0.01UF
0.1UF
0.1UF
1000PF
1000PF
1000PF
DDR TERMINATION VOLTAGE REGULATOR
VREF needs to be decoupled
to both SSTL2_VDD and SSTL2_GND with balanced
decoupling capacitors.
VREF should be routed over a
reference plane and isolated, and possibly
shielded with both SSTL2_VDD and SSTL2_GND
U26
1
8
NC
VTT
2
7
GND
PVIN
3
6
VSENSE
AVIN
VREF
4
5
VREF
VREF
VDDQ
LP2995
C128
GND_SSTL2
0.1UF
4
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3
2
TERMINATION
AT DDR
SDRAM_DQ[31..0]
VTT
VTT
GND_SSTL2
SSTL2_VDD
C283
C133
C322
0.1UF
0.1UF
1000PF
VTT
VTT
VREF
VREF
C288
C139
C327
0.1UF
0.1UF
1000PF
GND_SSTL2
GND_SSTL2
VTT
CA28
C298
C127
C299
C329
+
+
+
220UF/10V
10UF/6V/A
0.1UF
10UF/6V/A
0.1UF
SSTL2_VDD
+
C315
CA29
220UF/10V
0.1UF
3
2
6-12
1
VTT
RP7 51/RP
SDRAM_DQ0
8
1
SDRAM_DQ1
7
2
SDRAM_DQ2
6
3
SDRAM_DQ3
C111
D4
R27
5
4
C112
D4
RP7
RP9
51/RP
C115
D4
RP8
SDRAM_DQ4
8
1
SDRAM_DQ5
7
2
C116
D4
RP9
SDRAM_DQ6
6
3
RP10
SDRAM_DQ7
C119
C4
5
4
C120
C4
RP11
RP11 51/RP
C123
C4
RP12
SDRAM_DQ8
4
5
RP13
SDRAM_DQ9
C124
C4
3
6
SDRAM_DQ10
2
7
C127
B3
RP14
SDRAM_DQ11
1
8
C128
A4
RP15
RP17
RP13 51/RP
C129
C4
SDRAM_DQ12
4
5
C130
C4
RP18
SDRAM_DQ13
3
6
SDRAM_DQ14
2
7
C133
C3
RP19
SDRAM_DQ15
1
8
RP20
C135
B4
RP21
C136
B4
RP19 51/RP
SDRAM_DQ16
8
1
C139
B3
RP22
SDRAM_DQ17
7
2
SDRAM_DQ18
RP23
6
3
C279
C4
SDRAM_DQ19
5
4
RP24
C280
C4
C283
C3
RP26
RP15 51/RP
SDRAM_DQ20
RP28
8
1
C284
B4
SDRAM_DQ21
7
2
RP32
SDRAM_DQ22
C285
B4
6
3
SDRAM_DQ23
5
4
R5
C288
B3
R6
C296
C3
RP17
51/RP
R8
SDRAM_DQ24
C297
C3
8
1
SDRAM_DQ25
7
2
R10
C302
C3
SDRAM_DQ26
6
3
SDRAM_DQ27
5
4
R11
C303
C3
C315
A3
RP18
51/RP
R15
SDRAM_DQ28
C329
B2
8
1
R17
SDRAM_DQ29
7
2
C281
C4
SDRAM_DQ30
6
3
R19
SDRAM_DQ31
5
4
C282
C4
R20
C28
B4
R21
RP8
51/RP
SDRAM_A0
8
1
C287
B4
R22
SDRAM_A1
7
2
C290
D4
SDRAM_A2
6
3
R23
SDRAM_A3
5
4
C292
D4
R24
C294
C4
R31
RP10 51/RP
C295
C4
SDRAM_A7
1
8
R162
SDRAM_A6
2
7
C300
C4
SDRAM_A5
R164
3
6
SDRAM_A4
4
5
C301
C4
R168
C298
B3
R442
RP12
51/RP
C299
B2
SDRAM_A12
1
8
R443
SDRAM_A11
2
7
RP35
C5
R444
SDRAM_A9
3
6
SDRAM_A8
4
5
RP43
B5
CA28
RP44
B5
CA29
RP14 51/RP
RP45
B5
C319
SDRAM_RAS#
8
1
SDRAM_A14
7
2
RP47
B5
C320
SDRAM_A15
6
3
RP48
A5
SDRAM_A10
5
4
C321
R13
A5
C322
SDRAM_DQS0
R162
51
R14
A5
C324
SDRAM_DQS1
R164
51
SDRAM_DQS2
R11
51
R16
A5
C325
SDRAM_DQS3
R168
51
R18
A5
C326
C327
SDRAM_DQM0
R15
51
SDRAM_DQM1
R17
51
X1
SDRAM_DQM2
R19
51
SDRAM_DQM3
R20
51
U26
SDRAM_CLK#0
R21
51
SDRAM_CLK#1
R22
51
SDRAM_CLK0
R23
51
SDRAM_CLK1
R24
51
SDRAM_CLKE
R442
51
SDRAM_WE#
R443
51
SDRAM_CAS#
R444
51
SDRAM_CS0
R31
51
1
D
A5
D2
B2
D2
B2
C2
B2
C2
B2
C2
C2
C
C2
C2
D5
C5
C5
C5
C5
D5
D5
C5
B5
B5
B5
B5
B2
A2
A2
A2
A2
A2
A2
A2
B
A2
A2
B2
B2
B2
A2
A2
A2
B3
A3
C4
C3
C3
C3
B4
B3
B3
B3
A2
A3
A
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