Kenwood TK-2360 Service Manual page 11

4-2. Driver and Final Amplifi er Circuit
The signal from the T/R switch (D18 is on) is amplifi ed by
the RF AMP (Q201) and pre-drive amplifi er (Q203) to 50mW.
The output of the pre-drive amplifi er is amplifi ed by the
drive amplifi er (Q204) and the RF fi nal amplifi er (Q205) to
5.0W (1W when the power is low).
The drive amplifi er and the RF fi nal amplifi er consist of
two MOS FET stages.
The output of the RF final amplifier is then passed
through the harmonic fi lter (LPF) and antenna switch (D201
and D202) and is applied to the antenna terminal.
From
T/R SW
(D18)
+B
PC/BPF
(IC811)
5. Frequency Synthesizer Unit
5-1. Frequency synthesizer
The frequency synthesizer consists of the TCXO (X1),
VCO, PLL-IC (IC1), and buffer amplifi ers.
The TCXO generates 16.8MHz. The frequency stability
is 1.5ppm within the temperature range of –30°C to +60°C.
The frequency tuning and modulation of the TCXO are done
to apply voltage to pin 1 of the TCXO. The output of the
TCXO is applied to pin 10 of PLL-IC.
The VCO consists of 2 VCOs and covers a dual range of
185.95~223.95MHz for providing the first local signal for
reception. The operating frequency is generated by Q5 in
transmitting mode and Q4 in receiving mode. The oscillation
frequency is controlled by applying the VCO control voltage,
obtained from the phase comparator (IC1) to the variable ca-
pacitance diodes (D6, D7, D8, and D9 in transmitting mode
and D3 and D5 in receiving mode)
The TX pin of IC809 goes "high" in transmitting mode,
CIRCUIT DESCRIPTION
Q201 Q203 Q204
RF Pre-DRIVE DRIVE
AMP AMP
R307
R309
R310
Fig. 5 Driver and fi nal amplifi er and ACP circuit
4-3. APC Circuit
The APC circuit always monitors the current flowing
through the drive amplifi er (Q204) and the RF power ampli-
fi er (Q205) and keeps a constant current. The voltage drop
at R307, R309 and R310 is caused by the current fl owing
through the RF fi nal amplifi er. This voltage is applied to the
differential amplifi er IC301 (1/2).
IC301 (2/2) compares the output voltage of IC301 (1/2)
with the reference voltage from IC811. The output of IC301
(2/2) controls the VG of the RF power amplifi er and the drive
amplifi er to make both voltages the same.
The change of power high/low is carried out by the
change of the reference voltage.
Q205 D201,202
RF FINAL
AMP AMP
VG
VDD
IC301
(1/2)
causing Q7 and Q4 to turn off, and Q5 turn on. The TX pin
goes "low" in receiving mode.
The output from Q4 and Q5 are amplifi ed by a buffer am-
plifi er (Q8) and Q2, and then sent to the PLL-IC.
The PLL-IC consists of a prescaler, reference divider,
phase comparator, and charge pump. The input signal from
pin 10 and 17 of the PLL-IC is divided down and compared
at the phase comparator. The pulsed output signal of the
phase comparator is applied to the charge pump and trans-
formed into a DC signal in the loop fi lter (LPF). The DC sig-
nal is applied to the CV of the VCO and locked to keep the
VCO frequency constant.
PLL data is output from PLLLE (pin 46), PLLCLK (pin 47),
and PLLDAT (pin 45) of the MCU (IC809). The data is input
to the PLL-IC when the channel is changed or transmission
is changed to reception and vice versa. The PLL lock condi-
tion is always monitored by pin 48 (PLLLD) of the MCU.
When the PLL is unlocked, PLLLD goes low.
TK-2360
ANT
ANT
LPF
SW
IC301
(2/2)
11