Inter-m GEQ-1231D Service Manual page 6

ABSOLUTE MAXIMUM RATINGS*
V to DGND ..............................................................................................................................-0.3V to + 7V
DD
Digital Input Voltage to DGND
(CONVST, RD, CS) ...............................................................................................................-0.3V, V
Digital Output Voltage to DGND
(BUSY, DB0-DB7) .................................................................................................................-0.3V, V
REF to AGND ......................................................................................................................-0.3V, V
IN
Analog Input ..........................................................................................................................-0.3V, V
Storage Temperature Range.................................................................................................-65
Junction Temperature ........................................................................................................................... 150°C
Plastic DIP Package, Power Dissipation .............................................................................................450mW
Thermal Impedance...................................................................................................................105°C/W
JA
Lead Temperature, (Soldering 10 sec)................................................................................................260°C
SOIC Package, Power Dissipation ......................................................................................................450mW
Thermal Impedance .....................................................................................................................75°C/W
JA
Lead Temperature, Soldering
Vapor Phase (60 sec) ....................................................................................................................215°C
Infrared (15 sec)............................................................................................................................220°C
SSOP Package, Power Dissipation.....................................................................................................450mW
Thermal Impedance ...................................................................................................................115°C/W
JA
Lead Temperature, Soldering
Vapor Phase (60 sec) ....................................................................................................................215°C
Infrared (15 sec).............................................................................................................................220°C
Figure 1. Load Circuit for Digital Output Timing Specifications
ORDERING GUIDE
Model Linearity Error(LSB)
AD7819YN ± 1 LSB
AD7819YR ± 1 LSB
AD7819YRU ± 1 LSB
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only;
functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Description Package Option
Plastic DIP N-16
Small Outline IC R-16A
Thin Shark Small RU-16
Outline (TSSOP)
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PIN FUNCTION DESCRIPTION
Pin No. Mnemonic
1 V
REF
+ 0.3V
2 V
DD
IN
3 GND
+ 0.3V 4 CONVST
DD
+ 0.3V
DD
+ 0.3V
DD
to + 150°C
5 CS
6 RD
7 BUSY
8-15 DB0-DB7
16 V
DD
PIN CONFIGURATION DIP/SOIC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charge as high as 4000V
readily accumulate on the human body and test equipment and can discharge
without detection. Although the AD7819 features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic
discharges, Therefore, proper ESD precaution are recommended to avoid performance degradation or loss of
functionality.
Description
Reference Input, 1.2V to V .
DD
Analog Input, 0V to V .
REF
Analog and Digital Ground.
Convert Start. A low-to-high transition on this pin initiates a 1.5 µs pulse on an
internally generated CONVST signal. A high-to-low transition on this line initiates the
conversion process if the internal CONVST signal is low. Depending on the signal on
this pin at the end of a conversion, the AD7819 automatically powers down.
Chip Select. This is a logic input. CS is used in conjunction with RD to enable outputs.
Read Pin. This is a logic input. When CS is low and RD goes low, the DB7-DB0 leave
their high impedance state and data is driven onto the data bus.
ADC Busy Signal. This is a logic output. This signal goes logic high during the
conversion process.
Data Bit 0 to 7. These outputs are three-state TTL-compatible.
Positive power supply voltage, 2.7V to 5.5V.
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