Sony CX-VX55 Service Manual page 66

CX-VX55/VX77
Ver. 1.1
Pin No. Pin Name
57 IO_VSS
58 PWM4_M
59 PWM4_P
60 IO_VSS
61 PWM5_M
62 PWM5_P
63 DVSS
64 IO_VSS
65 IO_VDD
66 DVDD
67 PWM6_M
68 PWM6_P
69 IO_VSS
70 PWM7_M
71 PWM7_P
72 IO_VDD
73 IO_VSS
74 PWM8_M
75 PWM8_P
76 OVERLOAD
77 EPD_ENA
78 SO/SDA
79 SCK/SCL
80 DVDD
81 DVSS
82 SI/I2C_AD0
83 /CS/I2C_AD2
84 SPI/I2C
85 IO_VSS
86 CLK_IN
87 IO_VDD
88 DMIX_LRCK
89 DMIX_BCK
90 DMIX_SDOUT
91 DVDD
92 DVSS
93 DMIX_MCLK
94 IO_VDD
95 IO_VSS
96 /RESET
TEST_MODE1,
97, 98
TEST_MODE2
99 SCAN_ENA
100 TEST_MODE3
66
I/O
— I/O digital ground
O Negative PWM output of channel 4.
O Positive PWM output of channel 4.
— I/O digital ground
O Negative PWM output of channel 5.
O Positive PWM output of channel 5.
— Core digital ground
— I/O digital ground
— I/O digital power supply (+3.3 V)
— Core digital power supply (+2.5 V)
O Negative PWM output of channel 6.
O Positive PWM output of channel 6.
— I/O digital ground
O Negative PWM output of channel 7. (Not used in this set)
O Positive PWM output of channel 7. (Not used in this set)
— I/O digital power supply (+3.3 V)
— I/O digital ground
O Negative PWM output of channel 8. (Not used in this set)
O Positive PWM output of channel 8. (Not used in this set)
I Power stage overload indication input
O External amplifier power device enable output (H: active)
I/O SO for SPI mode signal input/output or SDA for I2C mode signal input/output.
I SCK for SPI mode signal input or SCL for I2C mode signal input.
— Core digital power supply (+2.5 V)
— Core digital ground
SI for SPI mode signal input or slave address 0 for I2C mode signal input.
I
(Fixed at H in this set)
Chip selector for SPI mode signal input or slave address 2 for I2C mode signal input.
I
(Fixed at H in this set)
I Host interface mode (SPI or I2C) select signal input (Fixed at L in this set)
— I/O digital ground
I External clock input (12.288MHz)
— I/O digital power supply (+3.3 V)
O PCM word clock (left-right clock) output of downmix signal. (Not used in this set)
O PCM bit clock output of downmix signal. (Not used in this set)
O PCM serial data output of downmix signal. (Not used in this set)
— Core digital power supply (+2.5 V)
— Core digital ground
O Main clock output for external downmix line output D/A converter. (Not used in this set)
— I/O digital power supply (+3.3 V)
— I/O digital ground
I H/W reset signal input (L: active)
I Test mode selection pin 1, 2 (Not used in this set)
I Scan enable signal input (H: active) (Not used in this set)
I Test mode selection pin 3 (Not used in this set)
Pin Description