Vector ZCB User Manual page 11

Static
RAM
MWRITE
Wait state generation
for memories slower
than 300 ns.
Bus Load
Buffering
Phantom:
Mirroring
Vector ZCB Single Board Computer
Fully compatible
Jumper option to generate MWRITE on board
Standard: option enabled.
3 options: generate one wait state on each bus
cycle, generate one wait state after each Ml
instruction, generate no wait states.
Standard: generate one wait state after each Ml
instruction.
1
standard
TTL
load on all inputs
Fan out: 15 standard (60 low power shottky)
Output buffer disable compatible with Vector Graphic
EPRCM/RAM
Boards, which generate phantom in response to
Power-on-clear (POe). Jumper selectable: on/off.
Standard: enabled
Standard: enabled, can
be
disabled.
SPECIFICATIONS-I/O
Capacity 1 serial RS-232 and 3 8-bit parallel ports programmable
as input or output.
Serial port 1, using 8251 controller chip.
Port addresses Any increment of four fran DOH to FER. Preset
addresses are: Data, 04H (echoed on 06H);
Control, 05H (echoed on 07H.)
Signal levels EIA RS-232C
RS-232 handshaking Typical handshaking is provided, ie. RI'S, CTS,
DI'R,
DSR, etc.
Asynchronous
Rates
Data bits
Stop bits
parity
110-9600 baud (switch selectable)
5 - 8, programmable
l, 1 1/2, or 2, programmable
Even, odd, or none, programmable
Rev. I-B 6/11/80