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3-1 .
I
N
T
R
OD
U
CTIO
N
3-2 . The theory o f
o
perat ion
o
f t he 8050Α
i
s d iscu ssed
on two
l
eve ls . Fi rst, t h e Fun ct i o na l Descript i o n
d
i sc usses
the o perat i o n
o
f t he DMM in term s of th e funct i on a l
re l ati o n ship s o f the m ajor circ ui ts . Second, the Circui t
D
escri pt io n presen ts α more deta iled d i scussi o n
o
f
t
he
major c ircuits .
B
ot h l evel s are illustrated by b l oc k
d
iagra m s a n d simplified schemati cs in
t
his sect io n
a
nd t he
sch e mat ic d iagra m s in Sectio n 7.
3-3 . FUN CTIO NA L
D
E SC R IP TIO N
3-4 . Th e maj or c ircui ts o f
t
he 8050Α are sh own in th e
fun ct io nal
b
loc k diagram in Figu re 3-1 . The ra nge a nd
funct io n sw i tches ro u te t he unkn own inpu t s i gna l
thro ugh
t
he si gnal co n d itio ners . The signal cond i ti oners
deve lo p α do vo l tage at t h e input to the α/ d con verter that
i
s
p
ro p orti o na l to t h e unknown inpu t signal. The α/d
co n verter, wor kin g in con j un ct i o n
w
i t h
t
h e
mi crocomputer, co nverts the do analogue o f
t
he unknown
inpu t sign a l to α
d
igi ta l value . The microcomputer
p
rocesses the d igital value and di spla ys t he result on th e
L
CD .
3-5 .
CI R C U IT D E SC RI PTION
3-6.
T he following
p
aragra phs describe each
o
f
t
he
m aj or c ircuits
i
n detail.
3-7.
Α/D Co n verter
3-8 .
T h e α /d co nverter in the 8050Α
u
ses th e du a l
s
l op e
m eth od of convers io n . In t hi s met hod, th e voltage
ana l ogu e o f th e input signa l (p ro po r t io nal to the
unkn ow n inpu t signal)
i
s a llowed to charge α capacitor
(integrate)
f
or an exact
l
ength
o
f
t
ime . The capac itor
i
s
t he n
d
i sc harged by α
r
efere ncevol tage. The
l
en gth
o
f
t
ime
re quired for th e ca pac itor to disch arge
i
s pr oport i o n al to
the unknown inpu t s ig nal. The microcomputer measu res
th e disc h arge t ime and displ ays the res ul t . The
f
ollowing
Sectio
n
3
T
h
eory of Operation
paragra phs d iscuss t h e actual α /d co nvers i o n in m ore
detail .
3-9 . Th e microcompu ter co n trols t he α/d co nverter vi a
C MOS switc hes . Fi g u re 3-2 s h ows th e simpl ified c i rc uits
formed d u rin g t he m ajor per iods o f α /d conversion
cyc les . Figure 3-3 is α t iming diagram
t
hat s h ows t he α/ d
co nverter cy c le resul ting fro m
t
h ree differen t inpu t
s i gnal s . Assume in reading th e following
p
aragraph s t hat
t h e
D
C V functi on
a
nd the 2 V ra nge are selected, and the
DMM is neari n g t he en d of t he Au tozero p eri od in its
co nvers i on cycl e.
3-10 . As Part Α
i
n Figure 3-2
s
h ows, t he C MOS
sw itches U 18 B
a
nd U 19A are c losed,
p
rovi ding vo l tage
l
e v el s that allow C8 and C33 to store the o ff set vo l tages o f
t
he buffer, in tegrator, a nd co mparator . C M OS swi tches
U 18D
a
nd U 19B connect the flying capac itor, C7, to α
referen ce voltage. Since the V funct i o n is se lected, C7
i
s
c harged by t he α / d co nverter referen ce vol tage sou rce. At
th e en d of
t
h e Autozero period, C7
i
s fully charged, C8
and C33 are c harged up to th e o ffset voltages, and t he
co mparator ou tpu t (C M )
i
s near α
t
h res ho ld
l
evel.
3-11.
Ass um e t h at an input o f -1 .0000 V do
i
s present at
t h e DMM
i
npu t ( first set of waveforms in Figu re3-3) . The
microcompu ter starts t h e In tegrate co mman d (ΙΝΤ) at
the sa m e t ime that
i
t ends t he AZ comman d . The α/ d
co nverter circ ui t
i
s switch ed to t he confi g urat i o n
s
h own in
Figure 3-2,
P
art Β.
C
M OS sw i tch U 18A co nn ects the
o utput o f
t
he s i gna l co n diti oners to the input termin a l
o
f
t
h e buff er.
F
or t he 2 V ra nge, t he m i crocompu ter selects
th e Χ1 gain
i
n
t
he buffer, and t he i npu t f ro m
t
he s ignal
co nditio ner
i
s applied to the buffer a nd integrator in
series . The in tegrator beg in s to charge C9 . The in sta nt
that t he charge on C9 shifts
f
ro m its initial level, t he
comparator toggles, a nd
i
ts Co mpare o utput (CM) goes
to α stead y leve l . S in ce th e unkn own
i
nput to t he DMM is
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