Display Data - Yamaha RX-V10MK II Service Manual

Q Q
3 7 6 3 1 5 1 5 0
NO. Terminal name
Name
1 Connection to GND (Digital system ground terminal)
VSS1 Ground terminal
2 Crystal oscillation Terminal to connect the crystal of the crystal oscillator for internal synchronous signal generation
XTAL IN
3 and a capacitor or to input an external clock. (2fsc or 4fsc)
XTAL OUT terminal
4 Crystal oscillation input Switching terminal between the mode to input a clock externally and the mode for crystal
CTRL1
oscillation. [L] = Crystal oscillation, [H] = External clock input.
switching terminal
5 Blank output terminal Terminal to output the blank signal (character and bordering OR signal) (MOD0 : complex
BLANK
synchronous signal output at [H]). When resetting (RST terminal = [L]), a crystal oscillation
clock is output (but not when resetting by the command).
6
OSC IN LC oscillation terminal Terminal to connect the coil of the oscillator character output dot clock generator and capacitor.
7
OSC OUT
8 CHARA Character output terminal Terminal to output a charactor signal (MOD0 : It becomes an output terminal to judge the
external synchronous signal at [H] and outputs the result after judging existence of the external
synchronous signal. When a synchronous signal exists, [H] is output.) When resetting (RST
terminal = [L]), a dot clock (LC oscillation) is output (but it is not output when reset by the
command).
9 Serial data input enable input terminal. The serial data input becomes enable at [L]. A pull-up
/CS Enable input terminal
resistor is built in (hysteresis input).
10 Input terminal of clock for serial data input.
SCLK Clock input terminal
A pull-up resistor is built in (hysteresis input).
11 SIN Data input terminal Srial data input terminal. A pull-up resistor is built in (hysteresis input).
12 Power supply terminal for complex image signal level adjustment (Power supply for analog
VDD2 Power supply terminal
T E
L 1 3 9 4 2 2 9 6 5 1 3
system)
13 Output terminal for complex image signal.
CV OUT Video signal output terminal
14 Connected GND or unconnected.
NC
15 Input terminal for complex image signal.
CV IN Video signal input terminal
16 Power supply terminal Power supply terminal (+5V : power supply for digital system)
VDD1
17 Video signal input terminal of the built-in synchronous separation circuit (When the built0in
SYN IN Synchronous separation
circuit input terminal synchronous separation circuit is not used, it becomes a horizontal synchronous signal input or
a complex synchronous signal input.)
18 Terminal to monitor built-in synchronous separation circuit bias voltage.
SEP C Synchronous separation
circuit bias voltage terminal
19 Terminal to output a complex synchronous signal of built-in synchronous separation circuit [H]
SEP OUT Complex synchronous
signal output terminal when internally synchronized at MOD1 : [H], [L] output when externally syncheonized) (When
the built-in synchronous separation circuit is not used, SYNIN input signal is output.)
20 Vertical synchronous signal Terminal to input a vertical synchronous signal by integrating the output signal of SEPOUT
SEP IN
terminal. Connect the integration circuit between SEPOUT terminals.
input terminal
Fix it to VDD1 when not used.
21
CTRL2 NTSC/PAL-M switching Pin setting has a priority over switching of NTSC/PAL/PAL-M/PAL-N method.
The NTSC method is selected after [L] = reset.
input terminal
NTSC/PAL/PAL-M/PAL-N method setting by a command is effective.
[H] = PAL-M method.
w w w
22 CTRL3 SEPIN input control Terminal to control whether or not to input VSYNC signal into SEPIN input terminal. [L] =
VSYNC not inputted.
terminal
23 Reset input terminal System reset input terminal. A pull-up resistor is built in (hysteresis input).
/RST
.
24 Power supply terminal (+5V : power supply for digital system)
VDD1 Power supply terminal (+5V)
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Function
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DISPLAY DATA

8 9
V401 : 13-BT-143GK (VU105900)
• PIN CONNECTION
Pin No.
1 2 3
CONNECTION
F1 F1 NP
Pin No. 22 23 24
CONNECTION NX NX NX
NOTE 1) F1, F2 ........ Filament
2) NP .............. No pin
3) NX .............. No extend pin
4) DL .............. Datum Line
• GRID ASSIGNMENT
Q Q
3 7 6 3 1 5 1
• ANODE CONNECTION
13G 12G 11G
P1
a
P2 b,c
P3
d
P4 e,f
P5 g
P6 j,p
P7 m
P8
P9 –
P10
–
P11 – –
c o
P12
– –
.
P13 – –
P14 – –
P15 – –
–
20
2 4 2
9 8
4 5 6 7 8 9 10 11 12 13 14 15 16
NP P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4
25 26 27 28 29 30 31 32 33 34 35 36 37
1G 2G 3G 4G 5G 6G 7G 8G 9G 10G 11G 12G 13G
5) 1G~13G ..... Grid
6)Angle of visual field
................... 33°min. on upper side.
................... 25°min. on lower side.
5 0 8 9 2 4 9 8
10G 9G 8G 7G 6G 5G
a a a a a a
b b b b b b
c c c c c c
d d d d d d
e e e e e e
f f f f f f
g g g g g g
h h h h h
j j j j j
m
– k k k k k
– m m m m m
– n n n n n
– p p p p p
– r r r r r
– t,u t,u t,u t,u t,u
RX-V10MK 2 2 2 2 2
9 9
17 18 19 20 21
P3 P2 P1 NX NX
38 39 40 41
NP NP F2 F2
2 9 9
4G 3G 2G 1G
a a a
b b b
c c c
d d d
e e e B1
f f f B2
g g g B3
h h h B4
j j j S1
k k k
m m m
n n n –
p p p –
r r r –
t,u t,u t,u –
21