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5
QQ
3 7 63 1515 0
UVLO
PWRGD
SYNC
COMP
TE
L 13942296513
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http://www.xiaoyu163.com
TPS54350PWP
VIN
1
VIN
2
VIN : Input supply voltage, 4.5 V to 20 V.
UVLO : Undervoltage lockout pin.
PWRGD : Power good output.
3
RT : Frequency setting pin.
SYNC : Bidirectional synchronization I/O pin.
ENA : Enable.
COMP : Error amplifier output.
4
VSENSE : Inverting node error amplifier.
AGND : Analog ground.
5
PGND : Power ground.
RT
VBIAS : Internal 8.0V bias voltage.
LSG : Gate drive for optional low side MOSFET.
6
PH : Phase node - Connect to external L - C filter.
BOOT : Bootstrap capacitor for high side gate driver.
ENA
7
8
* LC75700TS
20
19
18
17
KI1 - KI5 : Key scan input
KS1 - KS6 : Key scan output
P1-P4 : Output port terminal
OSC : Oscillator connection pin
res : Reset input
CE : Chip enable input
CL : Clock input
1
2
3
4
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ao
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i
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6
8
Q Q
3
6 7
1 3
16
15
14
13
DI : Data input
DO : Data output
VDD : Power supply
VSS : GND
5
6
7
8
u163
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FX-MG9107ZT/UC
6
7
2 9
9 4
2 8
16
BOOT
15
PH
14
PH
13
LSG
12
VBIAS
11
PGND
10
AGND
9
VSENSE
1 5
0 5
8
2 9
9 4
12
11
9
10
m
co
7
8
9 9
A
B
C
2 8
9 9
D
E
F
91
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