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HRAM INTERFACE SIGNALS
Type of Signal
Address
Data
Cycle Status
Strobe
Interrupt
HRAM
Signal Name
A15-AO
D17-DIO
D07-D00
SMEMR
SOUT
SMI
RFSH
PDBIN
PWR
V I 0
VI1
VI2
VI3
V I 4
V I 5
VI6
VI7
NMI
PINT
APPENDIX B
Description
16 bits of address from
the processor
8 bits of data to the
processor
8 bits of data from the
processor
True on memory reads
True on output
instructions (to ports,
not to memory)
True on op-code fetches
True on refresh cycles
Strobes data to the
processor from memory or
port
Strobes data from the
processor to memory or
port
Vectored interrupt
"
"
"
"
"
"
"
Non-maskable interrupt
Program Interrupt:
chiefly for application
when vectored interrupts
are not used
USER/TECHNICAL MANUAL
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