Circuit Description; Receive Signal Path; Squelch Control; S-Meter - Vertex VXR-5000 User Manual

RPP Programming Software Instruction
VXR-5000
Circuit Description
Receive Signal Path
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RF from the RX antenna jack is
dehvered to the RX Unit and passes through
the bandpass filter consisting of coils L4002,
L4003 and L4005, capacitors C40l6, C4017,
C4019, C4021 & C4023. Signals within the
frequency range of the receiver are then am-
plified by Q4010(3SK131). The amplified RF
IS
then bandpass filtered again by L4011,
L4013, L4015, and C4046, C4050, C4054,
C4057, C4061 and C4067 to ensure pure in-
band inP1:lt to the first double-balanced mixer
D4003 (DBM0135).
Buffered output from the VCO Unit is am-
plified by Q4011 (2SC3357) and low-pass fil-
tered by L40l4, L4016, C4056, C4060, C4062
and C4066, to provide a pure first local signal
between 112.4 MHz and 152.4 MHz to the
first double-balanced mixer. The 21.6 MHz
first mixer product is amplified by Q40l8
(2SC3356), then passed through dual mono-
lithic crystal filter (± 7.5 kHz BW) XF-4001
(21P15BU-1), to strip away all but the de-
sired signal, which is then amplified by
Q4024 (2SC3356).
The amplified 1st IF signal is then applied
to
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IF subsystem IC Q4017 (MC3372ML),
which contains the 2nd mixer, 2nd local oscil-
lator and limiter amplifier. A 2nd
L.a.
signal
generated from the 22.055 MHz crystal
X4003, produces the 455 kHz 2nd IF when
mixed with the 1st IF within Q4017. The 2nd
IF then passes through ceramic filter CF4001
(CFW455E), to strip away any unwanted
mixer products, and is then applied to the
limiter amp in Q4017, which removes any
amplitude variations in the 455 kHz IF before
detection of speech by ceramic discriminator
CD4001 (CDB455C16). The detected audio is
amplified by Q40l6 (NJM2902M) and deliv-
ered to J4002-pin-1 (DISC OUT).
Squelch Control
When no carrier is received, noise at the
output of the detector stage from Q40l7, pin
9 is sampled and fed to squelch gate Q4021
(2SA1179), VR-4001 adjusts the squelch
threshold before delivery to the 3-pole active
bandpass filter formed by Q4025 and Q4026
Instruction Manual
(both 2SC2812), where the audio is de-em-
phasized and audio frequencies above 5-kHz
are rejected. The noise signal is next amplified
by Q4023 and Q4020 (both 2SC2812), then
rectified by diode D4004(1 SS226) to produce
a DC control voltage for the squelch switch
section in Q4022. This resulting DC voltage is
amplified by Q4016-4(NJM2902M), then
compared with a reference voltage of 9 VDC
at Q40l6-3. The open-collector output volt-
age from analog switch Q4022 (DTC144EK)
is delivered to J4001 pin 7 (NSQ DET) and on
to microprocessor Q1009 pin 26 (NSQ DET).
Then, microprocessor pin 14 (U N E OUT)
goes high, turning on analog mute gate
Q2001 (NJU4066DM) on Control Unit 2, al-
lowing audio to pass from J2007, pin 1 (DISC
IN) through audio stages Q2008 and Q2006 to
line selector Q2004 (uPD4052BG).
CTCSS Operation
A CTCSS (Continuous Tone-Coded
Squelch System) is provided by program-
ming via CE-8 Software. The CTCSS IC
Q2008 (MX165CLH) contains a CTCSS tone
encoder for anyone of 39 subaudible tones.
The CTCSS audio level output from pin 16 of
Q2008 is amplified by Q2005-1(NJM2902M),
and adjusted by VR2003 before injection into
the audio chain at Q2003-2 (NJM2902M).
S-Meter
S-meter signal is output from pin 13 of
Q4017(MC3372ML) to C4118 where the 455
kHz signal is rejected(filtered), to buffer am-
plifier Q4016-2(NJM2902M) through J4001
pin 1 to CNTL Unit-I.
RX PLL & VCO Circuit
PLL circuitry on the RX unit consists of
PLL subsystem IC Q4014(MC1415190F),
which contains a reference oscillator / divider,
serial to parallel data latch, programmable
divider, phase comparator and a swallow
counter. Stability is obtained by a regulated
5-VDC supply via Q4001 (TA78L05) to Q4009
(DTA143EK) and temperature compensating
capacitors associated with the 12.8 MHz fre-
quency standard X4002 (GFS-720).
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