Table of Contents
Advertisement
Microphone Audio Circuit
The audio signals from the microphone (CON 406, connec-
tion 2) or the external microphone (through CON 151, connec-
tion 1) are amplified, pre-emphasized, and limited by IC404
and associated components.
The AF microphone signal is applied to pin 5 of IC405B to
produce an amplified and pre-emphasized audio signal. The
signal is limited by IC404C and applied through VR402 (and
the DCS AF signals from Q409 through VR401 when present)
to a low-pass filter IC404A and IC404B.
The low-pass filter rejects frequencies above 3 kHz (outside
the voice spectrum). The filtered signal is applied to the VCO
(within the frequency synthesizer circuit) through the analog
switch IC402B, CON 401 (connection 15) and flexible printed
circuit board 1, (connection 14). RV402 is used to adjust voice
deviation.
Transmitter And Harmonic Filter
The power amplifier contains transistors Q1-Q3, inductors
L3-L9 and capacitors C74 thru C86. When operating in the
transmit mode diode D6 is forward biased, enabling the RF
signal to pass to input buffer Q3. The buffered RF signal is
amplified by Q2. The output from Q3 is impedance matched to
Q2 by inductor L6 and capacitors C83 thru C86. Q1 is the
power amplifier. Diode D5 is reversed biased, inhibiting the
TX signal through the receiver stage. The amplifier RF signal
passes through the stripline coupler and is fed to the harmonic
low-pass filter, consisting of inductors L1 thru L3, and then to
the antenna connector (ANT).
The stripline coupler provides a sample of the RF signal to
the automatic power control.
Automatic Power Control
The automatic power control circuit contains the stripline
coupler, diode D3 and variable resistor VR2, two transistors Q8
and Q11. Q8 and Q9 form a differential amplifier. The RF
signal present in the coupler is rectified by D2, to produce a
DC voltage that is passed to the base of Q9 thru VR2. A portion
of the voltage TX 8.5V is applied to the base of Q8 through
voltage divider R7/R8. The difference signal at the collector of
Q9 is passed to Q10 and Q11 to produce a constant power
output to antenna connector ANT. VR2 is used to adjust the RF
power level.
Frequency Synthesizer Circuit
With data received from EEPROM IC408, the frequency
synthesizer circuit controls and produces the RF carrier fre-
quency for the transmitter during transmit and the local oscil-
lator frequency for the receiver. The frequency synthesizer
circuit consists of the following:
•
Voltage Controlled Oscillator Module
•
Loop Filter
•
PLL Frequency Synthesizer
•
Dual Modulus Prescaler
Voltage Controlled Oscillator (VCO) Module: The VCO
produces the transmit carrier frequency and the receive local
oscillator frequency. The module also includes a power line
filter.
Transistor Q301 is configured as a power supply ripple
filter. The VCO consists of transistors Q302, varactors D301
and D302 and trim capacitor TC301. These components form
a Colpitts oscillator. D301 and D302 produce a change in
frequency with a change in DC voltage and are controlled by
the phase detector signal present at the anodes of D301 and
D302. The local oscillator signal at the emitter of Q302 is
applied to amplifier Q303. The amplified signal from Q303
drives VCO output buffers Q304 and Q305.
When D6 is forward biased, carrier frequencies at the
collector of Q304 pass to the transmitter stage and harmonic
filter. When D7 is forward biased local oscillator frequencies
at the collector of Q304 are passed to the first mixer and the
first IF amplifier circuit. RX and TX oscillator frequencies are
passed to the dual modulus prescaler. TC301 is used for PLL
alignment.
Loop Filter: A loop filter consisting of transistors Q18 and
Q19, resistors R42 thru R47 and capacitors C7 and C101 thru
C112 filter the phase detector output from IC1-6 to remove any
reference frequency harmonics. It is then applied to the voltage
controlled oscillator module.
PLL Frequency Synthesizer: The PLL frequency synthe-
sizer (IC1) contains an oscillator for the reference crystal, a
reference divider, a programmable divider, a phase/frequency
comparator, an out of lock detector and a prescaler controller.
Reference oscillator IC1 along with a 12.8 MHz Crystal
X1, varactor diode D13, and thermistors TH1, TH2 and TH3
produce a temperature compensated 12.8 MHz reference signal
at pin IC1-18.
IC1 has two dividers, a data programmable divider and a
hardwired programmable reference divider. Pins 1, 2 and 20
are all connected to the +8V supply to divide the reference
frequencies by 2048. The prescaler divided output frequency
at pin IC1-10 is further divided by the programmable divider.
The 12.8 MHz frequency at pin 18 is the reference divider
to produce a reference frequency of 6.25 kHz respectively.
The programmable divided frequency (Fv) and the reference
frequency (Fr) are fed to the phase detector.
The phase detector (pin 6) produces negative pulses when
Fv<Fr positive pulses when Fv> Fr. When Fv = Fr and phase
is the same, the phase detector presents a high impedance at
pin 6. The signal at pin 6 is applied to the VCO through the
loop filter.
The out of lock detector produces a high logic level when
Fr and Fv are in the same phase and frequency, or low logic
level pulses when the loop is out of lock at IC1-9. The signals
at IC1-9 are buffered by Q17 and then integrated by R53 and
C46. The product of the integrating circuit is fed to flexible
PCB 1, connector 8.
The prescaler controller through pin 8 sets the prescaler
to divide by 128 or 129.
Dual Modulus Prescaler
Dual modulus prescaler IC2 divides the VCO frequency
by 128 or 129 with signals received from the PLL frequency
synthesizer. A low logic level received at pin 6 of IC2 will
divide the VCO frequency at pin 1 by 128. A high logic level
received at pin 6 of IC2 will divide the VCO frequency at pin
1 by 129. The divided VCO frequency is passed to the PLL
frequency synthesizer through pin 4.
RECEIVER
The Receiver uses dual conversion superheterodyning
techniques and consists of:
•
RF Amplifier,
•
First Mixer and First IF Amplifier,
•
Second Mixer, Second IF Amplifier and FM Detec-
tor,
•
Receiver Audio
•
Mute (Squelch).
LBI-38861C
RF Amplifier
The receiver RF amplifier contains helical resonators
FL1 thru FL3 and Q13. FL1 and Fl2 are configured as 2-pole
bandpass filters. The RF signal passes through the tuned
circuit FL1, RF amplifier Q13 and FL2 enabling the RF
signal at the operating frequency to pass to the first mixer.
First Mixer And First IF Amplifier
FET Q12 Transistor Q16, crystal filter XF1, helical reso-
nator FL3 and coil T4 form the First Mixer and First IF
Amplifier. The VCO local oscillator signal is filtered by FL3.
Q12 produces a difference frequency of 21.4 MHz at the
drain connection, from the filtered RF signal at the gate
connection and then filtered by the VCO local oscillator
signal at the source connection. The 21.4 MHz difference
frequency is filtered by the crystal filter XF1. The tuned
circuit T4 and associated components provide matching of
the crystal filter to insure good passband response and selec-
tivity. The IF signal is amplified by Q16 and passed to the
second mixer, second IF, and FM detector.
Second Mixer, Second IF, And FM Detector
A single conversion FM receiver integrated chip, IC3,
contains the second mixer, second IF, and FM detector func-
tions. The second local oscillator frequency is determined by
the crystal X2 (20.945MHz) connected to IC3-1. The IF
signal is received at IC3-16 through coupling capacitor C6.
The second IF frequency of 455 kHz is produced when the
1st IF frequency is applied to the mixer through pin 16. The
output of the second mixer through pin 3 is applied to a 455
kHz bandpass filter, CF1. The output of CF1 is passed to a
high gain IF amplifier (limiter) at IC2-5. The amplified
signal is coupled to the adjustable quadrature detector T5.
The audio output is produced at IC3-9 and applied to the
receiver audio circuit and the mute (squelch) circuit.
Receiver Audio Circuit
The receiver audio circuit comprises a low pass filter and
an audio amplifier on the RX/TX printed circuit board, and
a high pass filter and de-emphasis circuit on the control
printed circuit board.
The low pass filter is configured from coil L12, capacitor
C64 and resistor R39. AF signals from IC3-9 are filtered by
the low-pass filter to remove any components of the 455 kHz
IF signal. The filtered signal at flexible PCB 1, connection
14 is passed to the high pass filter on the control printed
circuit board through flexible CON 402, connection 15.
5
Advertisement
Table of Contents
