Squelch Control; Rx Pll And Vco Circuits - Vertex Standard VXR-9000 Service Manual

Circuit Description

Squelch Control

The squelch circuit consists of noise amplifier Q1033
(DTA144EE) and noise detector D1015 on the MAIN Unit,
and control circuitry within Main CPU Q3014
(HD64F2238BFA13) on the CNTL Unit.
When no carrier is received, noise at the output of the
audio detector stage of Q1028 (TA31136FN) is amplified
by Q1033 (DTA144EE), and then rectified by D1015
(MA143) to provide a DC control voltage for the squelch
switch. The resulting DC voltage is delivered to pin 23 of
J1005.
The DC voltage from the MAIN Unit is delivered to the
A-D analog input port (pin 51) of the Main CPU Q3014
(HD64F2238BFA13) on the CNTL Unit, which compares
the squelch threshold level to that which is memorized in
EEPROM Q3006 (BR24L32F) or set by the front panel
SQL control.

RX PLL and VCO Circuits

The receiver's PLL circuitry consists of PLL subsystem IC
Q1052 (MB15A02PFV1) on the MAIN Unit, which con-
tains a reference oscillator/divider, serial-to-parallel data
latch, programmable divider, phase comparator and a
swallow counter. Stability is obtained by a regulated 5 V
DC supply via Q1062 (L78M05T) and temperature com-
pensated 14.4 MHz crystal oscillator X1003.
The RX VCO made up two VCO circuit, one is Low-Band
RX VCO, consisting of FET Q1048 (2SK520) and varac-
tor diodes D1018, D1019, D1020, and D1021 (all 1SV229),
and another one is High-Band RX VCO, consisting of FET
Q1053 (2SK520) and varactor diodes D1027, D1028,
D1029 and D1030 (all 1SV229), oscillates between 221.35
MHz and 247.35 MHz according to the programmed re-
ceiving frequency. The RX VCO output passes through
buffer amplifier Q1059 (2SC5226) and first local amplifi-
er Q1019 (2SC3357) to the first mixer Q1018 (SPM5001),
as described previously. A portion of the RX VCO output
is applied to the prescaler/swallow counter section of PLL
IC Q1052 (MB15A02PFV1). There the RX VCO signal is
divided by 64 or 65, according to a control signal from the
Main CPU Q3014 (HD64F2238BFA13) on the CNTL Unit,
before being applied to the programmable divider sec-
tion of PLL IC Q1052 (MB15A02PFV1).
F-2
T h e d a t a l a t c h s e c t i o n o f t h e P L L I C
(MB15A02PFV1) also receives serial dividing data from
the Main CPU Q3014 (HD64F2238BFA13), which causes
the pre-divided RX VCO signal to be further divided by
75,330 – 81,330 (or 60,264 – 65,064) in the programmable
divider section of PLL IC Q1052 (MB15A02PFV1), de-
pending upon the desired receive frequency, so as to pro-
duce a 5 kHz (or 6.25 kHz) derivative of the current RX
VCO frequency. Meanwhile, the reference divider section
of the PLL IC Q1052 (MB15A02PFV1) divides the 14.4
MHz crystal reference from the reference oscillator X1003
and Q1045 (2SC4116GR) by 2880 (or 2304) to produce
the 5 kHz (or 6.25 kHz) loop reference.
The 5 kHz or 6.25 kHz signal from the programmable di-
vider (derived from the RX VCO) and that derived from
the crystal are applied to the phase detector section of the
PLL IC Q1052 (MB15A02PFV1), which produces a pulsed
output with pulse duration depending on the phase dif-
ference between the input signals. This pulse train is then
converted to DC, low pass filtered, then fed back to the
RX VCO varactor diodes D1018, D1019, D1020, D1021,
D1027, D1028, D1029, and D1030 (all 1SV229).
Changes in the DC voltage applied to the varactor diodes
D1018, D1019, D1020, D1021, D1027, D1028, D1029, and
D1030 (all 1SV229) affect the reactance in the tank circuit
RX VCO Q1048 and Q1053(both 2SK520), changing the
oscillating frequency according to the phase difference be-
tween the signals derived from the RX VCO and the crys-
tal reference oscillator. The RX VCO is thus phase-locked
to the reference frequency standard.
Transmit Signal Path
The speech audio from the CNTL Unit is applied to the
varactor diode D1010 (1SV214), which frequency modu-
lates the TX VCO from the unmodulated carrier at the
transmit frequency. The modulated transmit signal is buff-
ered by Q1026 (2SC5226), then passes through the RF
amplifier Q1030 (2SC3357) and RF diode switch D1016
to the PA Unit.
The transmit signal is applied to the RF amplifier Q5001
(2SC3357) and Q5008 (PD55008TR), then finally ampli-
fied by power amplifier Q5015 and Q5016 (both
PD55025S) up to 50 Watts. Harmonic and spurious radi-
ation in the final output is suppressed by a low pass filter
consisting of coils L5007, L5008 and L5010, plus capaci-
tors C5071, C5078, C5082, C5085, C5088 and C5125 on the
PA Unit, before delivery to the TX antenna jack.
Q1052