Aiwa HV-FX970 Service Manual page 29

QQ
3 7 63 1515 0
Pin No.
89 POWER FAIL
TE
L 13942296513
90
91
92, 93
94 FLD ENABLE
95 FLD CLOCK
96 FLD DATA IN
97 FLD DATA OUT
98 ~ 100
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Pin Name I/O
1. When a power failure is detected, this pin goes "L" and the following sequence of
events occurs.
2. Power failure detector timing sequence.
AVcc No (Back-up)
Power failure signal
I
Power failure
compensation relation
IIC O A reference CLOCK for Hi-Fi, TU/IF, MTS, SPEAKER
IIC O A reference DATA for Hi-Fi, TU/IF, MTS, SPEAKER
NC – Not connect
O Outputs chip enable signal for FLD Drive IC (IC5F1).
O Outputs clock signal to operate FLD Drive IC (IC5F1).
I
Serial interface signals for FLD Drive IC control.
O
NC O
Not connect
x ao
y
i
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8
AC POWER ON AC POWER OFF
Vcc for (Back-up)
5.3VA
10MHz OSC
36.768kHz OSC
Reset pulse
Normal
operation
state
(µ-COM memory loss state)
Q Q
3 6 7 1 3
u163
.
39
2 9 9 4 2 8
Description
t
t
t
t
t
t
Power failure
Power failure
compensation
compensation cancel state
state
1 5 0 5 8 2 9 9 4
m
co
9 9
2 8 9 9