ASROCK H81M BTC User Manual page 51

H81M BTC
tWRRDDR
Conigure between module write to read delay from diferent ranks.
tWRRDDD
Use this to change DRAM tRRSR Auto/Manual settings. he default is [Auto].
Conigure between module write to read delay from diferent DIMMs.
tWRWR
Conigure between module write to write delay.
tWRWRDR
Conigure between module write to write delay from diferent ranks.
tWRWRDD
Conigure between module write to write delay from diferent DIMMs.
tRDWR
Conigure between module read to write delay.
tRDWRDR
Conigure between module read to write delay from diferent ranks.
tRDWRDD
Conigure between module read to write delay from diferent DIMMs.
RTL (CHA)
Conigure round trip latency for channel A.
RTL (CHB)
Conigure round trip latency for channel B.
IO-L (CHA)
Conigure IO latency for channel A.
IO-L (CHB)
Conigure IO latency for channel B.
ODT WR (CHA)
Conigure the memory on die termination resistors' WR for channel A.
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