Pin Configuration - LG Flatron LCD 575LE Service Manual

L4973V3-L4973V5
L4973D3-L4973D5

Pin Configuration

OSC
OUT
OUT
GND
GND
GND
V
CC
V
CC
BOOT
PIN FUNCTIONS
PIN DIP-18
11
10
9
18
7,8
2,3
12
16
4,5,6
13,14,15
1
17
BA033
2
1
1. Vcc
3
2. GND
3. OUTPUT
TYPE
E
C
B
PIN CONFIGURATION
3.5A STEP DOWN SWITCHING REGULATOR
1 18 SYNC
2 17 SS
3 16 V5.1
4 15 GND
5 14 GND
6 13 GND
7 12 VFB
8 11 COMP
9 10 INH
D94IN162A
DIP18
PIN SO-20 NAME
12 COMP E/A output to be used for frequency compensation
11 INH A logic signal (active high) disables the device (sleep mode operation).
If not used it must be connected to GND; if floating the device is disabled.
10 BOOT A capacitor connected between this pin and the output allows to drive the
internal D-MOS.
20 SYNC Input/Output synchronization.
8,9 Vcc Not regulated DC input voltage
2,3 OUT Stepdown regulator output.
13 VFB Stepdown feedback input. Connecting directly this pin to the output 3.3V
and 5.1V are obtained; a voltage divider is requested for higher output
voltages. For voltage below 3.3V see note **
18 V5.1 Reference voltage externally available.
4,5,6,7 GND Signal ground
14,15,16,17
1 OSC An external resistor connected between the unregulated input voltage and
Pin 1 and a capacitor connected from Pin 1 to ground fixes the switching
frequency. (Line feed forward is automatically obtained)
19 SS Soft start time constant. A capacitor connected between this terminal and
ground determinates the soft start time.
Low Saturation Voltage type 3-terminal Regulator
OSC 1
OUT 2
OUT 3
GND 4
GND 5
GND 6
GND 7
V 8
CC
V 9
CC
BOOT 10
D94IN163A
SO20
DESCRIPTION
Vcc
1
Reference Voltage
GND
2
BLOCK DIAGRAM
PARTS
KIA7042
20 SYNC
19 SS
18 V5.1
17 GND
16 GND
15 GND
14 GND
13 VFB
12 COMP
11 INH
OUT
3