LG 32LM6200 Service Manual page 25

CI TS INPUT
Close to MT5369
MT5369_TS_OUT[0-7] AR902
47
MT5369_TS_OUT[0]
MT5369_TS_OUT[1]
MT5369_TS_OUT[2]
MT5369_TS_OUT[3]
MT5369_TS_OUT[4]
MT5369_TS_OUT[5]
MT5369_TS_OUT[6]
MT5369_TS_OUT[7]
AR903
47
R907 47
MT5369_MISTRT
R908 47
MT5369_MIVAL_ERR
R909 47
MT5369_MCLKI
Close to MT5369
CI TS OUTPUT
Close to CI Slot
MT5369_TS_IN[0-7]
MT5369_TS_IN[0] AR900
MT5369_TS_IN[1]
MT5369_TS_IN[2]
MT5369_TS_IN[3]
MT5369_TS_IN[4]
AR901
MT5369_TS_IN[5]
MT5369_TS_IN[6]
MT5369_TS_IN[7]
Close to CI Slot
R915 47
MT5369_TS_CLK
R916 47
MT5369_TS_VAL
R917 47
MT5369_TS_SYNC
C900
12pF
50V
Close to MT5369
OPT
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI DETECT
CI_MDI[0-7]
CI CI_MDI[0]
CI_MDI[1]
CI_MDI[2] /CI_CD1
CI_MDI[3]
/CI_CD2
CI CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
PCM_RST
CI_IN_TS_SYNC
CI_IN_TS_VAL
CI_IN_TS_CLK
C902
12pF
50V Close to CI Slot
OPT
/PCM_IORD
/PCM_IOWR
CI_TS_DATA[0-7]
/PCM_OE
47 CI
CI_TS_DATA[0]
/PCM_WE
CI_TS_DATA[1]
CI_TS_DATA[2] /PCM_CE1
CI_TS_DATA[3]
47 CI CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
CI
CI_TS_CLK
CI
CI_TS_VAL
CI
CI_TS_SYNC
/PCM_IORD
/PCM_IOWR
+3.3V_NORMAL
+5V_CI_ON
R910 R914
10K 10K
CI CI
/PCM_WAIT
+3.3V_NORMAL
PCM_INPACK
CI_VS1
R906 R913 R919
R918 R923 /PCM_REG
R924
10K 47K 47K
47K 10K
10K
OPT CI CI CI
OPT
OPT /PCM_CE2
/PCM_IRQA
R900
10K
OPT
CI_A_VS1
/PCM_A_REG
+5V_CI_ON
C904 C905
0.1uF 10uF
CI 10V
CI
R927
/CI_CD1
CI_TS_DATA[3]
CI_TS_DATA[4]
CI_TS_DATA[5]
CI_TS_DATA[6]
CI_TS_DATA[7]
R911 22
/PCM_CE2
CI_VS1
R912 22
CI_MDI[0-7]
CI_MDI[0]
CI_MDI[1]
CI_MDI[2]
CI_MDI[3]
R926
CI_MDI[4]
CI_MDI[5]
CI_MDI[6]
CI_MDI[7]
CI_TS_CLK
R921 22 CI
PCM_RST
R922 22 CI
/PCM_WAIT
R920 22 OPT
PCM_INPACK
/PCM_A_REG
CI_TS_VAL
CI_TS_SYNC
CI_TS_DATA[0]
CI_TS_DATA[1]
CI_TS_DATA[2]
CI
R928
/CI_CD2
R925
0
CI_A_DATA[0-7]
CI_A_DATA[0]
CI_A_DATA[1]
CI_A_DATA[2]
CI_A_DATA[3]
CI_A_DATA[4]
CI_A_DATA[5]
CI_A_DATA[6]
CI_A_DATA[7]
R929 R930
R933 R934 R935 R936
10K 47K
10K
10K 10K 10K
CI CI
OPT
OPT
CI
CI
CI_A_ADDR[0-14]
CI_A_ADDR[0]
CI_A_ADDR[1]
CI_A_ADDR[2]
CI_A_ADDR[3]
CI_A_ADDR[4]
CI_A_ADDR[5]
CI_A_ADDR[6]
CI_A_ADDR[7]
CI_A_ADDR[8]
CI_A_ADDR[9]
22 R931
CI_VS1 CI_A_ADDR[10]
CI_A_ADDR[11]
OPT
CI_A_ADDR[12]
R932 22
CI_A_ADDR[13]
/PCM_REG
CI_A_ADDR[14]
OPT
JK900
10118309-015LF
CI
GND GND
35 1
100 /CI_DET1 DAT3
36 2 CI_A_DATA[3]
CI
TS_OUT3 DAT4 CI_A_DATA[4]
37 3
TS_OUT4 DAT5
38 4 CI_A_DATA[5]
TS_OUT5 DAT6 CI_A_DATA[6]
39 5
TS_OUT6
40 6 DAT6 CI_A_DATA[7]
TS_OUT7 /CARD_EN1 CI R939 22
41 7
CARD_EN2
42 8 ADDR10
VS1
/O_EN
43 9
IORD
44 10 ADDR11
IOWR
ADDR10
45 11
TS_IN_SYN ADDR8
46 12
TS_IN0
47 13 ADDR13
TS_IN1 ADDR14
48 14
TS_IN2
49 15 /WR_EN
TS_IN3 /IRQA R940
50 16
VCC C906 0.1uF
51 17 VCC C907
CI
CI 0.1uF
0 OPT VPP VPP R938 0 OPT
52 18 16V
TS_IN4
53 19 TS_IN_VAL
TS_IN5 TS_IN_CLK
54 20
TS_IN6
55 21 ADDR12
TS_IN7 ADDR7
56 22
TS_OUT_CLK
57 23 ADDR6
CI_RESET
ADDR5
58 24
CI_WAIT ADDR4
59 25
INPACK
60 26 ADDR3
REG ADDR2
61 27
TS_OUT_VAL
62 28 ADDR1
TS_OUT_SYN ADDR0
63 29
TS_OUT0
64 30 DAT0 CI_A_DATA[0]
TS_OUT1 DAT1 CI_A_DATA[1]
65 31
TS_OUT2
66 32 DAT2 CI_A_DATA[2]
100 /CI_DET2 /IO_BIT R937 10K
67 33
GND OPT
68 34 GND
G2 69 G1
CI_IN_TS_VAL
CI_IN_TS_CLK
CI_IN_TS_SYNC
CI_DATA[0-7]
AR904 0 CI_DATA[0]
CI
CI_DATA[1]
CI_DATA[2]
CI_DATA[3]
AR905 0 CI_DATA[4]
CI
CI_DATA[5]
CI_DATA[6]
CI_DATA[7]
CI_ADDR[0-14]
CI_ADDR[0]
AR906 0 CI
CI_ADDR[1]
CI_ADDR[2]
CI_ADDR[3]
CI_ADDR[4]
AR907 0 CI
CI_ADDR[5]
CI_ADDR[6]
CI_ADDR[7]
AR908 0 CI_ADDR[8]
CI
CI_ADDR[9]
CI_ADDR[10]
CI_ADDR[11]
AR909 0 CI_ADDR[12]
CI
CI_ADDR[13]
CI_ADDR[14]
CI_A_DATA[0-7]
/PCM_CE1
CI_A_ADDR[10]
CI_A_ADDR[11]
CI_A_ADDR[9]
CI_A_ADDR[8]
CI_A_ADDR[13] R941 22
/PCM_OE
CI_A_ADDR[14]
R942 22
/PCM_WE
22 CI
/PCM_IRQA
CI_A_ADDR[12]
CI_A_ADDR[7]
CI_A_ADDR[6]
CI_A_ADDR[5]
CI_A_ADDR[4]
CI_A_ADDR[3]
CI_A_ADDR[2]
CI_A_ADDR[1]
CI_A_ADDR[0]
+5V_CI_ON
2011.11.21
MID_MAIN_CI
13