Circuit Description - ViewSonic VS11404-1G Service Manual

4. Circuit Description

A. A/D converter (PC & YPbPr) and DVI(HDCP) input
The MST5151A-LF offers designers the flexibility of an analog interface and
High-Definition Multimedia Interface (DVI) receiver integrated on a single chip. Also
included is support for High bandwidth Digital Content Protection (HDCP).
Analog Interface
The MST5151A-LF is a complete 8-bit 165 MSPS monolithic analog interface optimized
for capturing Component Video (YPbPr) and RGB graphics signals. Its 165 MSPS encode rate
capability and full power analog bandwidth of 300 MHz supports all HDTV formats (up to
1080p) and FPD resolutions up to UXGA (1600 x 1200 @ 60 Hz). The analog interface
includes a 165 MHz triple ADC with internal 3.3V reference, a Phase Locked Loop (PLL),
and programmable gain, offset, and clamp control. The user provides only 1.8V and 3.3V
power supply, analog input, and Hsync. Three-state CMOS outputs may be powered from
1.8V to 3.3V. The MST5151A-LF on-chip PLL generates a pixel clock from Hsync. Pixel
clock output frequencies range from 12MHz to 165 MHz. PLL clock jitter is typically less
than 500 ps p-p at 165 MHz. The MST5151A-LF also offers full sync processing for
composite sync and Sync-on-Green (SOG) applications.
Digital Interface
The MST5151A-LF contains a DVI(HDCP) 1.0 compatible receiver and supports all
HDTV formats (up to 1080p) and display resolutions up to UXGA (1600 x 1200 @ 60 Hz).
The receiver features an intra-pair skew tolerance of up to one full clock cycle. With the
inclusion of HDCP, displays may now receive encrypted video content. The MST5151A-LF
allows for authentication of a video receiver, decryption of encoded data at the receiver, and
renew ability of that authentication during transmission as specified by the HDCP v1.1
protocol.
Fabricated in an advanced CMOS process, the MST5151A-LF is provided in a
space-saving 100-lead LQFP surface-mount Pb free plastic package and is specified over the 0
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C to 70
B. Video Decoder (video)
The SAA7117 is a highly integrated NTSC, PAL, and SECAM video decoder support for
high quality LCD-TV video applications, SAA7117 supports NTSC/PAL chroma and luma
separation using a 2-dimensional adaptive comb filter for reducing the cross-luma and
cross-chroma artifacts. The frame buffer is also use for 2D noise reduction circuit that resumes
good visual quality when the input signal is a noisy video source
The SAA7117 10-bits CMOS Analog-to-Digital Converters(ADC) at four-fold "ITU656"
oversampling(54MHZ);Sixteen analog input pins.allowing fo multiple combinations of
composite.S-Video component video;Eight 3-level capable sensor pins for D-connector or
SCART AV- and RGB- switch signals(three of those can be active simultaneously),one Fast
blanking input;Level sensitive fast blanking(RGB switch control);I²C read back of digital
AGC gain factor; The component, composite, or S-Video signals are sampled at a free-run
external clock frequency (10~58.6 MHz). After the video decoder processing, the video data
was sent out with a line-locked alignment rate (24.576 MHz).
The SAA7117 comes with 160-pin QFP package.
C. Scaling controller
The MST5151A-LF chip is a LCD-TV controller chip for color display up to SXGA or
/WXGA wide screen panel. It includes a 128/256/512 4-bit/fixel font 3D interlace-to
progressive video processing. It also supports non-linear scaling for 4:3 to/form 16:9
conversion, flexible picture in video display, cinema to TV conversion, hue/saturation
adjustment, and advanced OSD system.
The MST5151A-LF chip is targeted for the applications of high-end LCD-TV. It will
accept all HDTV video signals for flat panel display. It comes with 256-pin LQFP package.
General Feature:
1M*32Bit*4Banks SDRAM controller for interlaced to progressive video processing and
ViewSonic Corporation
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C temperature range.
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N2750w-2G