Table of Contents
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Programming the memory hole or any kind of implementation that needs an adjustment in
50
system RAM size if needed.
Updates CMOS memory size from memory found in memory test. Allocates memory for
52
Extended BIOS Data Area from base memory.
60
Initializes NUM-LOCK status and programs the KBD type matic rate.
75
Initialize Int-13 and prepare for IPL detection.
78
Initializes IPL devices controlled by BIOS and option ROMs.
7A
Initializes remaining option ROMs.
7C
Generate and write contents of ESCD in NVRam.
84
Log errors encountered during POST.
85
Display errors to the user and gets the user response for error.
87
Execute BIOS setup if needed / requested.
8C
Late POST initialization of chipset registers.
8D
Build ACPI tables (if ACPI is supported)
8E
Program the peripheral parameters. Enable/Disable NMI as selected
90
Late POST initialize of system management interrupt.
A0
Check boot password if installed.
A1
Clean-up work needed before booting to OS.
Takes care of runtime image preparation for different BIOS modules. Fill the free area in
A2
F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime
language module. Disables the system configuration display if needed.
A4
Initialize runtime language module.
Displays the system configuration screen if enabled. Initialize the CPU's before boot, which
A7
includes the programming of the MTRR's.
A8
Prepare CPU for OS boot including final MTRR values.
A9
Wait for user input at configuration display if needed.
AA
Uninstall POST INT1Ch vector and INT09h vector. De-initializes the ADM module.
AB
Prepare BBS for Int 19 boot.
AC
End of POST initialization of chipset registers.
B1
Save system context for ACPI.
00
Passes control to OS Loader (typically INT19h).
95
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