Sony PRS-505 Service Manual page 41

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Pin No. Pin Name
E8 UART1_RXD
E9 UART1_CTS
E10 NAND-CLE
E11
E12
E13
E14 PCA3PCORE
E15 SRETHER
F1, F2
F3, F4 D28, D27
F5, F6
F7 PCMSCARD
F8 SRUSB20
F9 SSI_TXDAT
F10 SRSRAM1
F11
F12, F13 PD14, PD15
F14 USB_CHRG
F15
G1, G2
G3, G4 D26, D25
G5
G6
G7
G8 to G10
G11 PCA3PIO
G12 PCUSB11
TE
L 13942296513
G13
G14
G15
H1
H2
H3 to H5 D22 to D24
H6 to H9
H10
H11 USB_BOOT
H12
H13
H14
H15
J1, J2
J3, J4
J5
J6, J7
J8
J9
J10
J11
J12
J13
www
J14, J15 BOOT1, BOOT0
K1
.
K2
K3
K4
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I/O
I Serial data input from the sub CPU
O Clear to send signal output to the sub CPU
O Command latch enable signal output to the NAND fl ash mamory
PDOE O Output enable signal output to the indicator controller
PD10 O Video data output to the indicator controller
TIN I Timer input terminal
O Regulator control signal output terminal
O Not used
A20, A19 O Address signal output to the NOR fl ash memory
I/O Two-way data bus with the SD-RAM
NVDD1 - Power supply terminal (+2.9V)
O Regulator control signal output terminal
O No used
O Audio data output to the audio D/A converter
O Not used
QVDD3 - Power supply terminal (+1.9V)
O Video data output to the indicator controller
O USB charge enable signal output to the sub CPU
SRDSP O Reset signal output to the audio D/A converter
A17, A18 O Address signal output to the NOR fl ash memory
I/O Two-way data bus with the SD-RAM
NVDD1 - Power supply terminal (+2.9V)
VSS - Ground terminal
NVDD4 - Power supply terminal (+2.9V)
VSS - Ground terminal
O Regulator control signal output terminal
O Not used
RSCINT I Interrupt request signal input from the memory stick duo/SD memory card controller
Memory stick duo detect signal input from the memory stick duo slot
MSDET I
"L": memory stick duo slot in
SRMS O Not used
Address signal output to the memory stick duo/SD memory card controller, SD-RAM and
A15 O
NOR fl ash memory
A16 O Address signal output to the NOR fl ash memory
I/O Two-way data bus with the SD-RAM
VSS - Ground terminal
NVDD2 - Power supply terminal (+2.9V)
I Main CPU boot mode control signal input from the sub CPU
Hardware suspend mode output to the memory stick duo/SD memory card controller
PCR5C O
"L": hardware suspend mode
PA14 O Not used
I2CSDA I/O Two-way IIC bus with the temperature sensor
TMS I Test mode select signal input terminal
Address signal output to the memory stick duo/SD memory card controller, SD-RAM and
A14, A12 O
NOR fl ash memory
D21, D20 I/O Two-way data bus with the SD-RAM
NVDD1 - Power supply terminal (+2.9V)
VSS - Ground terminal
QVDD1 - Power supply terminal (+1.9V)
VSS - Ground terminal
SRR5C O Reset signal output to the memory stick duo/SD memory card controller
I2CSCL O IIC bus serial clock signal output to the temperature sensor
TCK I Test clock signal input terminal
XTDO O Test data signal output terminal
I System boot mode select signal input terminal
x ao
Address signal output to the memory stick duo/SD memory card controller, SD-RAM and
y
A13 O
NOR fl ash memory
i
Address signal output to the memory stick duo/SD memory card controller and NOR fl ash
A11 O
memory
XCS2 O Chip select signal output to the SD-RAM
D19 I/O Two-way data bus with the SD-RAM
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8
Not used
Q Q
3 6 7 1 3
Not used
Not used
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2 9 9 4 2 8
Description
1 5 0 5 8 2 9 9 4
Not used
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PRS-505
9 9
2 8 9 9
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