Horizontal Output Pwm 2 - Sony DTV-01 Manual

High definition television
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Horizontal Output PWM 2

The purpose of the entire Horizontal Output PWM stage is to manufacture
a regulated B+ source for the horizontal output transistor. The first part of
the H. Output PWM circuit manufactures a pulse that places the B+ cor-
rection at the middle of the screen. In the second part of the H. Output
PWM circuit the B+ source is regulated.
Regulation
R e g u la t io n C ir c u it r y
D e v ic e
I n p u t
Q 4 0 1 6 ,
H . S a w lo w r e s e t
Q 4 0 2 3 ,
p u ls e .
C 4 0 0 7
I C 4 0 0 4
R a m p – p in 6
B + e r r o r – p in 7
I C 4 0 1 1
P W M – p in 1 2
E r r o r
N T S C / D T V s w –
r e g u la t o r
p in 5
I C 4 0 0 5
D C – p in 5
F H s t a t u s – p in 6
Ramp Manufacture
At CN4009/pin 9 the 1.5Vp-p low going pulse made by the previous MMV
stage is input to transistor Q4016/base. The low turns off Q4016, which
turns on Q4023 to discharge C4007. When Q4023 turns off, C4023
charges. This creates a ramp at the horizontal frequency. This ramp is
applied to comparator IC4004/pin 6 and produces an output pulse at pin 1.
The width of that output pulse is dependent upon the DC error voltage
input IC4004/pin 7.
The following scope shot shows the ramp (ch 2) and the input pulse used
to reset it (ch 1). The ramp waveform (ch 2) can be compared to the
output pulse (ch 3) to see that approximately 1.3 volts was input at IC4004/
pin 7 to produce this pulse width. The output waveform (ch 4) shows the
pulse is inverted and amplified by the output MOSFET.
O u t p u t
P u r p o s e
R a m p
T r a n s is t o r s r e s e t c h a r g in g
v o lt a g e
c a p a c it o r t o m a k e a r a m p
v o lt a g e .
P W M –
A d ju s t s p u ls e w id t h t o
p in 1
c o r r e c t B + v o lt a g e .
E r r o r O u t
C r e a t e s a B + c o r r e c t io n
– p in 6
v o lt a g e . A d ju s t s v o lt a g e
f o r h ig h e r H . f r e q . U s e d in
D T V .
D C – p in 7
A m p lif ie r
L o w e r s B + w h e n t h e r e is
n o H p h a s e lo c k ( F H
s t a t u s )
101
P M 3 3 9 4 , F L U K E & P H I L I P S
c h 1 : p k p k = 2 . 9 5 V
ch1
c h 2 : p k p k = 8 . 5 6 V
1
ch2
ch3
2
ch4
T
3
C H 1 ! 1 . 0 0 V =
C H 2 ! 5 . 0 0 V =
C H 3 ! 1 0 . 0 V = B W L
4
C H 4 ! 1 0 0 V = A L T M T B 5 . 0 0 u s - 0 . 6 6 d v c h 3 +
W a v e f o r m H D 2 – P u ls e W id t h C o n tr o l
N a m e
C h a n n e l 1
H . S a w u s e d t o
m a k e r a m p v o lt a g e .
C h a n n e l 2
R a m p v o lt a g e
C h a n n e l 3
P W M p u ls e
C h a n n e l 4
P W M O u t p u t
T im e b a s e
Error Voltage
IC4011 makes an error voltage by comparing the PWM B+ output at Q4022/
drain to an internal reference voltage. The difference is an error voltage
output IC4011/pin 6. This error voltage is used to maintain the B+ voltage
despite the load variations that occur when the brightness or scan width
changes.
When a HDTV signal is received, the horizontal oscillator frequency is
slightly higher than that from an NTSC signal. The change in frequency
results in a change in horizontal efficiency. To maintain the same picture
brightness and focus, the reference voltage in IC4011 is adjusted to com-
pensate for this input change. The NTSC/DTV input at IC4011/pin 5 is
monitored for this change. However, the correction has little effect on the
output voltage even if pin 5 was changed manually.
The B+ error signal leaves IC4011/pin 6 and is amplified by IC4005. The
other input to amplifier IC4005 is used to reduce the B+ voltage when no
TV station (H sync) is detected. An FH status voltage from the main micro
IC3512 is input to C4005/pin 6 for this purpose. When there is no H sync
detected, the FH line goes high. This reduces the voltage at IC4005/pin 6
to narrow the output pulse width and lower the PWM B+ slightly.
L o c a t io n
V o lt a g e / d iv
C N 4 0 0 9 / p in 9
1 . 2 V p - p
I C 4 0 0 4 / p in 6
8 V p - p
I C 4 0 0 4 / p in 1
1 2 V p - p
Q 4 0 2 2 / d r a in
1 5 0 V p - p
5 u s e c / d iv

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