Sanyo DC-PT100 Service Manual page 27

IC BLOCK DIAGRAM & DESCRIPTION
IC601 LC75854E (LCD Driver)
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
KS6 49
K11 50
K12 51
K13 52
K14 53
K15 54
TEST 55
56
VDD
VDD1 57
VDD2 58
VSS 59
OSC 60
DO 61
62
CE
CL 63
DI 64
1 2 3 4 5 6 7 8
Pin Pin No.
Segment output pins for displaying the display
1 to 4 data transferred by serial data input.
S1/P1 to S4/P4
S5 to S39 5 to 39 The S1/P1 to S4/P4 pins can be used as general-
purpose output ports under control data.
40
COM1
Common driver output pins.
41
COM2
The frame frequency (fo) is given by :
COM3 42
fo=(fosc/512)Hz.
COM4
43
Key scan output pin.
When a Key matrix is to be formed, the diode is
normally installed to the timing line of the Key
KS1/S40, 44,
scan to prevent short-circuit.
KS2/S41 45 Such short-circuiting will not cause damage
because the impedance of output transistor is the
KS3 to KS6 46 to 49
unbalance CMOS output. The KS1/S40, KS2/S41
pins can be used as segment output when so
specified by the control data.
Key scan input pin at pull-down resistance is
KI1 to KI5 50 to 54
built-in.
IC330 KIA4558F (Dual Low Noise Operational
Amplifier)
1
OUT A
A
-IN A 2
+IN A 3
V 4
EE
TEST
32 S32
31 S31
S30
30
S29
29
S28
28
OSC
27 S27
26 S26
25 S25
S24
24
S23
23
22 S22
21 S21
VDD
20 S20
19 S19
VDD1
S18
18
VDD2
S17
27
9 10 11 12 13 14 15 16
Descriptions
8 V
CC
7 OUT B
B
-IN B
6
+IN B
5
40 41 42 43
COMMON
55
DRIVER
CLOCK
60
GENERATOR
DO
61
DI 64
CCB
INTERFACE
CL 63
CE 62
56
57
VDET
58
VSS
59
I/O Pin Pin No.
OSC 60
O
CE 62
CL 63
O
DI 64
DO 61
TEST 55
VDD1 57
O
VDD2 58
VDD 56
I
VSS 59
IC360 NJM2058M (Operational Amplifier)
A OUTPUT
A INPUT
A +INPUT
V+
B+INPUT
B INPUT
B OUTPUT
- 30 -
. . . . . . . . . . . . . .
. . . . . . . . . . . . . .
39
SEGMENT DRIVER & LATCH
SHIFT REGISTER
CONTROL
RESISTER
KEY BUFFER
KEY SCAN
54 53 52 51 50
Descriptions
Oscillator pin, which, together with externally
connected resistor and capacitor, makes up an
oscillator circuit.
Oscillator pin, which, together with externally
connected resistor and capacitor, makes up an
oscillator circuit.
CE : Chip enable
CL : Synchronization clock
DI : Transfer data
DO : Output data
Connect to ground.
Used for applying the LCD driver 2/3 bias voltage
exrernally. Must be connected to VDD2 when a 1/2
bias scheme is used.
Used for applying the LCD driver 1/3 bias voltage
exrernally. Must be connected to VDD1 when a 1/2
bias scheme is used.
Power supply pin to provide a voltage between
4.5V to6.0V.
Power supply pin to connect to ground.
1 14
A
D
2 13
3 12
4
11
5 10
6
C
B
7
5 4 3 2 1
49 48 47 46 45 44
I/O
I/O
I
I
I
O
I
I
I
-
-
D OUTPUT
D INPUT
D+INPUT
V
C+INPUT
9 C INPUT
8 C OUTPUT