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VIDEO SIGNAL PROCESS I BLOCK DIAGRAM
MAIN P.C.B.
CAMERA
B1
FROM CCD DRIVE
DATA (0-9)
BLOCK DIAGRAM
23-32
LUMA
TO
ANALOG VIDEO I/F
BLOCK DIAGRAM
CHROMA
LCD/EVF-R
LCD/EVF-G
TO LCD
BLOCK DIAGRAM
LCD/EVF-B
/EVF BLOCK DIAGRAM
H-SYNC
V-SYNC
ALC PWM CONTROL
TO AF
IRIS CLOSE
BLOCK DIAGRAM
IRIS OPEN
CAMERA P.C.B.
(WITH SD SLOT)
SD SLOT
B9901
B1
13,14,75,70
29,30,34,35
B9901
B1
77
77
SD
B9901
B1
CARD
15
15
B9901
B1
CARD DET(L)
73
73
B9901
B1
CARD PROTECT(L)
74
74
TPB(-)
1
TPB(+)
2
JK7002
DV JACK
TPA(-)
3
TPA(+)
4
GND
5
JK7003
FL7001
USB
LINE
JACK
FILTER
R404
R405
(WITH USB2.0 HIGH-SPEED)
IC3001 (CAMERA DIGITAL SIGNAL PROCESS/SHUFFLING)
51 52
CAMERA SIGNAL
54
61
PROCESS
D/A
259
CONVERTER
D/A
264
CONVERTER
D/A
242
CONVERTER
D/A
248
CONVERTER
D/A
253
CONVERTER
319
H-SYNC
318
V-SYNC
73
ALC PWM CONTROL
75
IRIS CLOSE
76
IRIS OPEN
X3002
281
48MHz CLOCK
48MHz
OSC
282
48MHz CLOCK
SD
272
275
INTERFACE
271
271
SD CLOCK
277
277
CMD
TO SYSTEM
CONTROL
BLOCK DIAGRAM
145
148
IEEE1394
INTERFACE
150
151
(W/O USB2.0
HIGH-SPEED)
R402
291
USB
R401
INTERFACE
292
IC401 (USB INTERFACE)
9
USB
68
74
201 202
INTERFACE
7
79
84
205
215
41
49
16
65
56
62
REC VIDEO SIGNAL
DIGITAL SIGNAL
DV FORMAT
PROCESS
INTERFACE
DIS CONTROL
/ZOOM CONTROL
/EFFECT CONTROL
/JPEG
/GUI
DRAM
IC6001 (SYSTEM MICROCONTROLLER)
L13 L14 M13 M14
8
11 13
16
ADM (0 -15)
MICROCONTROLLER
N15 N17 N18
19
22 24 26
INTERFACE
P15 P18 R16 R18
28
T17 T18
PV-GS29P/PV-GS29PC/PV-GS36P/PV-GS39P/PV-GS39PC/PV-GS59P/PV-GS59PC
75
PV-GS29P / PV-GS36P / PV-GS39P / PV-GS59P / PV-GS29PC / PV-GS39PC / PV-GS59PC
PB VIDEO SIGNAL
REC AUDIO SIGNAL
PB AUDIO SIGNAL
DBR DATA (4 BIT)
161
DBR(0 -3)
164
168
ADDA (4BIT)
169
ADDA(0 -3)
TO/FROM
171
VIDEO SIGNAL
173
PROCESS II
BLOCK
DIAGRAM
27MHz CLOCK
102
27MHz CLOCK
READ(H)
175
READ(H)
DRAM
VAL
174
VAL
HEAD SW PULSE 1
159
HEAD SW PULSE 1
183
AUDIO DATA 0
178
AUDIO DATA 1
TO/FROM
AUDIO
AUDIO SIGNAL
DIGITAL
180
AUDIO L/R CLOCK
PROCESS
SIGNAL
BLOCK
PROCESS
DIAGRAM
182
AUDIO BIT CLOCK
181
AUDIO MASTER CLOCK
B1
CAMERA DAC/TG SERIAL CLOCK
302
CG/AFE SERIAL CLOCK
64
B1
CAMERA DAC/TG SERIAL DATA
300
CG/AFE SERIAL DATA
65
B1
TG CS(L)
303
CG CS(L)
67
B1
TO/FROM
FCK (18MHz)
48
FCK (18MHz)
CCD DRIVE
59
BLOCK
B1
DIAGRAM
CAM VD
50
CAM VD
68
B1
CAM HD
49
CAM HD
69
B1
CAMERA DAC CS(L) 304
CAMERA AFE CS(L)
66
B1
12MHz CLOCK
60
MICROCONTROLLER
INTERFACE
VIDEO SIGNAL PROCESS I BLOCK DIAGRAM
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