Block Diagram - Yamaha 01x Service Manual

H G

BLOCK DIAGRAM 001

AN
DM
MIC/LINE
INPUT 1
MIC/LINE
INPUT 2
OUT IN
JK304
MIDI A
JK303
MIDI B
OUT IN
SCI1
MAIN
SCI0
CPU
SCI2
IC101 (208P)
/CS0, /CS3
HD6417709SF133
CPU : 128MHz
BUS : 32MHz
8MHz
155
XTAL
MD0–
X101 MD31
156
EXTAL
JK301
/CS5
FOOT SW IN 192
INPUT
PORT
1
/CS6
FOOT SWITCH
JK302 FOOT SW IN
191
INPUT
2
PORT
LCD DATA CN101
LCD[0]–LCD[7]
OUTPUT
PORT
A/D
PORT
F E
+5A +12A +16A
SW
REGULATOR
REGULATOR
3
1 3 1
IC219 IC218
+5D
JK101 +48V
JK102
PHANTOM +48V
+48V
ON/OFF
SW502
SEL1
IC301 (16P)
SEL1 and SEL2 are linked
MIDI-B
MIDI-B
SCI 1
SEL2
IC306 (16P)
166
164
168
96, 99
26 20
16Mbit 64Mbit
IC117 IC116
(86P)
(48P) FLASH ROM SDRAM
DATA BUS
101 /MCS5
8
DSP7
/MCS5
(MIXER) (EFFECT)
/MCS6 9
102
/MCS6
IC210
(208P)
GATE 14
ARRAY
(PLLP2)
/CS-DSP7 /CS-DSP6
IC602
(208P)
98, 87 FSELA, FSELB
199, 201
203
D
+1.8D +3.3D
SW
REGULATOR
REGULATOR
3 1 2
IC505 IC503
+2.5D
+5D
SW
REGULATOR REGULATOR
3 1 2
IC502
IC504
DC/DC
+5M REGULATOR
CONVERTER
TR501, 502 2
IC501
L508
SCI 1
or
MLAN_MIDI 3
MLAN_MIDI 5
/CS-REC25
GATE
27
ARRAY
(REC2)
IC402
(64P)
ENC[0–8]
IC205
(40P)
4Mbit
DSP6
DRAM
OUTPUT
PORT
IC202
(176P)
29
4Mbit
/CS-GA15
22 30
/CS-GA25
DRAM
31
/CS-GA35 INPUT
PORT
IC208
(40P)
GATE
ARRAY
(CI-SUB)
IC403
(128P)
OUTPUT
PORT
C B
AC Adaptor
STANDBY/ON
DC IN
SW501
1
PA-300
JK501
+5M
1
CN501
1
MLN2
CN202 CN6
2
3
(See Page 5)
midi port
5
4
1
PN
ENCODER DATA
RA[1]–RA[9], RB[1]–RB[9]
ENCODER JOG dial
EC201–208 EC101
DRIVER
SW/LED SCAN DATA
SC[0]–SC[7]
TA403,404
KEY MATRIX
KEY DATA
K[0]–K[12]
DRIVER
LED MATRIX
LED DISPLAY DATA
LED[0]–LED[14]
TA401,402
MOTOR FADER DATA
FDIA[1]–FDIA[9]
FDIB[1]–FDIB[9]
DRIVER
FDIC[1]–FDIC[9]
IC103–112
(9P)
2 ch
Analog SW
FAD 1, 2 IC107
(16P)
FAD 3
VR101–109
MOTOR FADER x 9
28CA1-8825603-001
A
O1X
1
AC IN
2
3
RE
4
5
MF
CN101
+5M
CH1–8
STEREO
6
3