Sony CDX-M50IP Service Manual page 32

CDX-M50IP/MR50IP
• IC Block Diagrams
IC300 TDA8588AJ/N2/R1 (MAIN BOARD (1/4))
TAB 1
LF– 3 2
I C BUS
FL
LF+ 5
LR– 7
RL
LR+ 9
IN-RL
11
S-GND
13
PROTECTION/
DIAGNOSTIC
IN_LF
15
VP
RR+ 17
RR
RR– 19
RF+ 21
STANDBY/
FR
MUTE
RF– 23
CHIP DETECT/
DIAGNOSTIC
BATTERY TEMPERATURE
DIAG
25
ENABLE
DETECTION PROTECTION
LOGIC
SWITCH
SW2 27
SW1 29 SWITCH
REG3 31
REG4 33
VP 35
REFERENCE
VOLTAGE
LOADDUMP BACK-UP
REG2 37 REGULATOR PROTECTION SWITCH
CDX-M50IP/MR50IP
IC601 BA8271F-E2 (MAIN BOARD (1/4))
BUS ON
14 VCC
BUS.ON
1
SWITCH
2 SDA
RESET
RST 2 13 RST
4
SCL
SWITCH
12 BUS.IN
11 CLK-IN
6 BATTERY
VP2
BATT 3 10 B/U-C
SWITCH
8
PGND3
4
CLK
VREF 5
10 SVR
DATA I/O 6 9 DATA IN
IN_RR
12
GND 7 8 DATA OUT
14 IN_LR
16 ACGND
18 PGND2
20 VP1
22 STB
24 PGND1
26 RST
28 CRES
30 REG1
32 GND
34 REG5
36
CBU
IC401 BD3442FS-E2 (MAIN BOARD (2/4))
A1
1
100k
A2 2
100k
B1 3
100k
B2 4
100k
C1 5
100k
C2 6
100k
DP1 7
250k
DN
8
250k
DP2 9
250k
DS32 10
DS12
11
DS22 12
EBIAS
13
DS21 14
DS11 15
DS31 16
IC50 TDA7333013TR (MAIN BOARD (2/4)) (CDX-MR50IP only)
INTERPOLATOR
VDDA 1
REF3 2
REF2 3
RDS
REF1 4 INTN
DEMODULATOR &
SYNCHRONIZATION
VSS 5
TM 6
VDDD 7
RESETN 8
32 32
INPUT INPUT VOLUME1 TREBLE VOLUME2
SELECTOR GAIN /MUTE /BASS
/MIDDLE
EFFECT
FADER
LPF
FADER
SPECTRUM
ANALYZER
3
BAND PASS SINC4 SIGMA DELTA
16 MPX
FILTER FILTER CONVERTER
15 INTN
SDAOUT
RAM
SDAIN 14 CSN
RDSREG BUFFER TEST LOGIC
2 SCK
I C/SPI 13 SA
& &
SPI
INTERFACE
12 SDA
CONTROL PIN MUX'S
TESTREG
11 SCL
LOGIC
2
10 XTO
OSCILLATOR
9 XTI
VCC2 32 FIL
31 GND
I2C 30 SDA
BUS
LOGIC
29 SCL
28 MUTE
VCC 27 VCC
26 OUTF1
FADER
FADER 25 OUTF2
FADER 24 OUTR1
FADER 23 OUTR2
22 OUTS1
21 OUTS2
20
ADJ
19 SOUT
18
DATA
17 CLK