Panasonic KX-FP701ME Service Manual page 20

KX-FP701ME
6.3.6. Reset Circuit (Watch dog timer)
The output signal (reset) from pin 4 of the voltage detect IC (IC3) is input to the ASIC (IC1) 114 pin.
1. During a momentary power interruption, a positive reset pulse of 50~70 msec is generated and the system is reset com-
pletely.
2. The watch dog timer, built-in the ASIC (IC1), is initialized by the CPU about every 1.5 ms.
When a watch dog error occurs, pin 115 of the ASIC (IC1) becomes low level.
The terminal of the 'WDERR' signal is connected to the reset line, so the 'WDERR' signal works as the reset signal.
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