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ZXR10 8905/8908/8912 System Hardware Schematic Drawing ......... 10 Figure 5 ZXR10 8902 System Hardware Schematic Drawing ........... 10 Figure 6 ZXR10 8900 main control board Schematic Drawing ..........11 Figure 7 8902 main control board Schematic Drawing .............. 11 Figure 8 Back panel of 8912 main control card .................
IP network data products and end-to-end individualized solution. ZXR10 8900 series Terabit MPLS routing switches are the latest introduced products by ZTE with high capacity and performance for the core/aggregation layer of the network. The series has the following models: ZXR10 8912, 8908, 8905, and 8902, among which ZXR10 8912 reaches up to 2.88Tbps for the bandwidth of the backplane, 1152Gbps...
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• Complete network management: being able to implement the whole network management during the whole course with ZTE NetNumen N31. • High performance price ratio: has more competitive price with the same performance and configuration compared with equipment from other vendors.
Support for MPLS L2/L3 VPN for all services implementation ZXR10 8900 L2 MPLS VPN supports VPWS (martini) and VPLS, while L3 VPN complies with RFC2547bis. The product can interwork with MPLS VPN service of devices from other mainstream vendors. It supports MPLS-TE to guarantee reliability of network and nodes.
ZXR10 8900 Product Description Unified network management for lower OPEX ZXR10 8900 supports RFC1213 SNMP, with which the in-band NM can use Telnet (CLI) or SNMP (GUI) to implement unified NM based on NetNumen platform. NetNumen N31 is a data network management platform designed with the latest Internet technology.
ZXR10 8900 Product Description Functionality ZXR10 8900 series Terabit MPLS routing switches are the latest introduced products by ZTE with high capacity and performance for the core/aggregation layer of the network. The series has the following models: ZXR10 8912, 8908,8905 and 8902 among which ZXR10 8912 reaches up to 2.88Tbps for the bandwidth of the backplane, 1152Gbps...
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Supporting port mirroring: mirroring implementation including control module, particular ports and particular slots. • QoS: ZXR10 8900 series switch provides complete QoS support for IP DiffServ solution. It is completely compatible with standards of DiffServ solution including RFC2474, RFC2475, RFC2497, and RFC2498. It supports packet 802.1p and...
Figure 5 ZXR10 8902 System Hardware Schematic Drawing Presently, the line cards of ZXR10 8900 series 10G MPLS routing switches are universal. The schematic drawings of ZXR10 8900 series including control module, switching module, packet processing module, interface module and power supply module are as shown in Figure 4 and Figure 5.
ZXR10 8900 Product Description Figure 6 ZXR10 8900 main control board Schematic Drawing Serdes SDRAM Console Switching Management Fabric BOOTR Serdes In practical operation, the main control board of ZXR10 8902 implements control feature, which is as shown in Figure 7.
4.2.4 Power Module In considering the practical implementation, ZXR10 8900 10G MPLS switch is designed with redundant power supply system to guarantee equipment’s high reliability required by telecom. At the same time, 48V DC power supply mode and 220V AC power supply mode are provided.
4.2.5 Interface Module The interface module of ZXR10 8900 series 10G MPLS Switches refers to the line interface card. The existing available line cards include: GE electrical interface board, 10G Ethernet optical interface board, and protocol processing board. ZXR10 8900 series 10G MPLS Switches use swappable optical transceivers in all optical interfaces of line cards.
Software Architecture 4.3.1 System software architecture ZXR10 8900 series 10G MPLS Ethernet routing switches provide L2 switching, L3 routing, multi-service, wire speed switching, and QoS guarantee. Their system software implements management, control and data forwarding. The basic job contains system...
Functional Module As Figure 40 shows, to implement protocols of layers previously mentioned, the software architecture is divided as per functional modules. Figure 40 ZXR10 8900 software architecture 4.3.3 The operating system ROS is a single-processor, multi-task, real-time operating system.
The forwarding core of the Ethernet routing switch is Ethernet ASIC chip, through which the Layers 2 and 3 services, ACL and QoS functions of ZXR10 8900 series switches are all implemented after the right configurations. The SSP switching subsystem ensures accurate and sensible forwarding by configuring the chip attributes in the right way, which is key to the software of ZXR10 8900 series switches.
ZXR10 8900 Product Description 4.3.5 Coprocessor Software Subsystem In ZXR10 8900 series switches, packets are forwarded at two places: either over the ASIC chip or over the coprocessor. The coprocessor system is used to process at wire speed some complicacies that are beyond the power of the packet processor, such as NAT, context exchange, and broadband access control.
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VLAN translation itself needs no support of the protocol packet. It can be implemented through static configuration on ZXR10 8900 series switches. Note that the VLAN cannot be partitioned on the MAC address basis one VLAN translation is enabled, and vice versa.
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Super VLAN is purely software function. It is transparent to the ASIC chip and data are switched according to the VLAN configuration in the software module. The PVLAN does not need the support of the protocol packet. Static configuration on the ZXR10 8900 series switches settles all.
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ZXR10 8900 Product Description supported. The functions of enabling STP on the aggregation link and on the port are supported. The ZXR10 8900 series support STP, RSTP, MSTP as well as the hybrid networking of these three. 4.3.7.8 Link Aggregation Module Link aggregation means that physical links with the same transmission media and transmission rate are bound together, making them look like one link logically.
RFC, the count of hops should be no more than 16. Therefore, the RIP is suitable to be used as the internal gateway of a small Autonomous System (AS). RIP protocol of the ZXR10 8900 series switches performs the following functions: •...
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In this area, each of all the devices has a particular database to describe the topology of the area. The OSPF protocol of the ZXR10 8900 perform the following functions: • Making a hierarchical network topology that is suitable for large interconnection networks •...
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L2 router. The L2 routers must form a backbone, similar to the backbone area “o” of OSPF. The IS-IS protocol of the ZXR10 8900 have the following characteristics: • Supporting address aggregation on L1 and L2 •...
RP in the remote domain will transmit this information to these receivers. Thus, the multicast data packet can be forwarded between domains. By fully supporting PIM-SM and MSDP, the ZXR10 8900 series switches can provide a complete multicast solution.
The depth of the label stack indicates the layer of the network: If a packet passes tunnel or a MPLS network at a lower layer, the stack depth will increase, vice versa. Presently the ZXR10 8900 series switches can provide a complete MPLS protocols, which functions to: •...
VPN-Ipv4 routes from one autonomous system to another and distributing the VPN-Ipv4 routes with Multi-hop EBGP. ZXR10 8900 series switches support perfect MPLS L3 VPN function, address overlapping, accesses of CE static route, RIP, OSPF and BGP, BGP extension attribute, ability negotiation and route refresh and VRF binding on interface and in VLAN.
Figure 50 Basic VPLS network model ZXR10 8900 series support VPWS in Martini draft, and extended LDP. 8900 series can build up different LSP channels based on service type. They support Ethernet encapsulation and VLAN encapsulation.
SERVER function if this method is adopted to build a network. In another application case, the process for the client to obtain the address is transferred and implemented by ZXR10 8900 if DHCP server and the client are not in the same Broadcast Domain. That’s what is called DHCP trunk technically.
4.3.14 Statistics and Alarm Subsystem The statistics and alarm subsystem is also a function that ZXR10 8900 must provide. This subsystem interacts with all other subsystems of the software. This system receives statistics and alarm configuration information from management and maintenance subsystem.
4.3.18 Monitoring Subsystem The monitoring subsystem of ZXR10 8900 implement on-line detection of the state of the boards and ports. The on-line detection for a board can be categorized into the following processes based on the loop detection functions provided by different chips of the board: •...
Large scale MAN convergence layer networking application ZXR10 8900 switch series are terabit MPLS switches with large capacity and high port density. They are suitable for metro network aggregation layer applications. In this scenario, core layer is made up of by large-scale routers. Aggregation layer is connected by 8900/G/6900 switch series.
Figure 52 Medium and small scale MAN core layer networking application Campus Network Applications A campus network usually requires large capacity, high port density and large bandwidth. ZXR10 8900 Series switches are very suitable for campus network deployment. See Figure 53 for its typical application. Figure 53 Campus Network Applications.