DLP Design DLP-USB245M-G User Manual

Usb to fifo parallel interface module

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DLP-USB245M-G USB to FIFO Parallel Interface Module
The DLP-USB245M-G is the 2nd generation, lead free version of DLP Design's USB adapter. This device adds
extra functionality to it's DLP-USB1 predecessor with a reduced component count and a new low price.
DLP-USB245M FEATURES
Send / Receive Data over USB at up to 1 M Bytes /
sec
384 byte FIFO Transmit buffer / 128 byte FIFO
receive buffer for high data throughput
Simple interface to CPU or MCU bus
No in-depth knowledge of USB required as all USB
Protocol is handled automatically within the module
FTDI's Virtual COM port drivers eliminate the need
for USB driver development in most cases.
Integrated 3.3v Regulator – No External Regulator
Required
Integrated Power-On-Reset circuit
Integrated 6MHz – 48Mhz clock multiplier PLL
USB Bulk or Isocronous data transfer modes
4.4v - 5.25v Single Supply taken directly from the
USB port
UHCI / OHCI / EHCI host controller compatible
USB 1.1 and USB 2.0 compatible
USB VID, PID, Serial Number and Product
Description
Strings stored in on-board EEPROM.
EEPROM programmable on-board via USB
VIRTUAL COM PORT ( VCP ) DRIVERS for
-
Windows 98 and Windows 98 SE
-
Windows 2000 / ME / XP
-
Windows CE **
-
MAC OS-8 and OS-9
-
MAC OS-X
-
Linux 2.40 and greater
D2XX ( USB Direct Drivers + DLL S/W Interface )
-
Windows 98 and Windows 98 SE
-
Windows 2000 / ME / XP
[ ** = In planning or under development ]
Copyright © DLP Design 2002
DLP-USB245M User Manual
APPLICATION AREAS
Rapid Prototype Development
USB ISDN and ADSL Modems
High Speed USB PDA Interface
USB Interface for Digital Cameras
USB Interface for MP3 players
High Speed USB Instrumentation
USB Smart Card Readers
Set Top Box (S.T.B.) PC-USB interface
USB Hardware Modems
USB Wireless Modems
USB Bar Code Readers
Page 1 of 15

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Summary of Contents for DLP Design DLP-USB245M-G

  • Page 1 DLP-USB245M-G USB to FIFO Parallel Interface Module The DLP-USB245M-G is the 2nd generation, lead free version of DLP Design’s USB adapter. This device adds extra functionality to it’s DLP-USB1 predecessor with a reduced component count and a new low price.
  • Page 2: General Description

    Commands to set the baud rate are ignored – the device always transfers data at its fastest rate regardless of the application’s baud rate setting. The latest versions of the drivers are available for download from DLP Design’s website at http://www.dlpdesign.com.
  • Page 3: Driver Software

    FT_EE_UARead is used to read its contents. Download FTDI Application Notes AN232-03, AN232-05, AN232-06, and AN232-07 for detailed instructions on how to install and remove the drivers. Copyright © DLP Design 2002 Page 3 of 15...
  • Page 4 4. Connect the DLP-USB245M board to the PC via a standard, 6-foot USB cable. This action initiates the loading of the USB drivers. When prompted, select the folder where the DLL version of the device drivers were stored Copyright © DLP Design 2002 Page 4 of 15...
  • Page 5 At this point the DLP-USB245M is ready for use. Note that the DLP-USB245M will appear non-responsive if data sent from the host PC is not read from the FT245BM device by an attached microcontroller/microprocessor/DSP/FPGA/ etc… Copyright © DLP Design 2002 Page 5 of 15...
  • Page 6 (Out) Goes Low after the device is configured via USB, then high during USB suspend. Can be used to control power to external logic using a P-Channel Logic Level MOSFET switch. Copyright © DLP Design 2002 Page 6 of 15...
  • Page 7 I/O Bi-directional Data Bus Bit # 4 I/O Bi-directional Data Bus Bit # 3 I/O Bi-directional Data Bus Bit # 2 I/O Bi-directional Data Bus Bit # 1 I/O Bi-directional Data Bus Bit # 0 Copyright © DLP Design 2002 Page 7 of 15...
  • Page 8 USB suspend as it has Self-Powered its own Power Supply. 5V System c) A Self Powered Device can be used with any USB Host and both Bus and Self Powered USB Hubs. Copyright © DLP Design 2002 Page 8 of 15...
  • Page 9 Set the soft pull-down option bit in the FT232BM EEPROM. c) For 3.3v power controlled circuits VCCIO must not be powered down with the external circuitry (PWREN# gets it’s VCC supply from VCCIO). Copyright © DLP Design 2002 Page 9 of 15...
  • Page 10 Unit WR Active Pulse Width WR to WR Pre-Charge Time Data Setup Time before WR inactive Data Hold Time from WR inactive WR Inactive to TXE# TXE inactive after RD cycle Copyright © DLP Design 2002 Page 10 of 15...
  • Page 11 .32 typ (8.0 typ) .52 typ dia (13.2 typ) .19 typ dia (.46 typ) .6 typ .16 typ .36 typ dia (15.2 typ) (4.2 typ) (9.2 typ) .7 typ (17.8 typ) Copyright © DLP Design 2002 Page 11 of 15...
  • Page 12 FIFO IO Pin Characteristics ( VCCIO = 3.3v ) Parameter Description Units Conditions Output Voltage High I source = 2mA Output Voltage Low I sink = 4 mA Input Switching Threshold Note 1 VHys Input Switching Hysteresis Copyright © DLP Design 2002 Page 12 of 15...
  • Page 13 UCom Differential Common Mode UVDif Differential Input Sensitivity UDrvZ Driver Output Impedance Note 2 Note 2 – Driver Output Impedance includes the external 27R series resistors on USBDP and USBDM pins. Copyright © DLP Design 2002 Page 13 of 15...
  • Page 14: Contact Information

    This product and its documentation are supplied on an as is basis and no warranty as to their suitability for any particular purpose is either made or implied. DLP Design will not accept any claim for damages howsoever arising as a result of use or failure of this product.
  • Page 15: Appendix A - Dlp Usb245M Schematic

    DLP-USB245M User Manual Appendix A – DLP USB245M Schematic Copyright © DLP Design 2002 Page 15 of 15...

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