Code Option; Code Option Register (Word 0) - IBM EM78P221/2N Specification

LVR characteristics are set at Code Option Word 0, Bits 10 and 9. Detailed operation
mode is as follows:
Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
TYPE1 TYPE0 LVR1 LVR0 CLKS ENWDTB OSC2 OSC1 OSC0
Bits 10~9 (LVR1 ~ LVR0): Low Voltage Reset enable bits. If Vdd has crossover at Vdd
Internal Reset

6.11 Code Option

EM78P221/2N has two Code Option Words and one Customer ID word that are not a
part of the normal program memory.

6.11.1 Code Option Register (Word 0)

Bit 12 Bit 11 Bit 10 Bit 9
TYPE1 TYPE0 LVR1 LVR0 CLKS
Product Specification (V1.0) 10.19.2007
(This specification is subject to change without further notice)
reset level as Vdd changes, the system will reset.
LVR1, LVR0 VDD Reset Level
11
10
01
00
Vdd
Vdd < Vreset not longer than 10us, the system still keeps on operating
Fig. 6-18 LVR Waveform Situation
Word 0
Bit 12 ~ Bit 0
8-Bit Microcontroller with OTP ROM
Word 0
Bit 7 Bit 6 Bit 5
VDD Release Level
NA (Power-on Reset) (default)
2.5V
3.0V
4.0V
<LVR Voltage drop
Word 1
Bit 12 ~ Bit 0
Word 0
Bit 8 Bit 7 Bit 6 Bit 5
ENWDTB
OSC2 OSC1 OSC0
EM78P221/2N
Bit 4 Bit 3 Bit 2
- PR2
2.7V
3.2V
4.2V
>LVR Voltage drop
Word 2
Bit 12 ~ Bit 0
Bit 4 Bit 3 Bit 2
-
PR2
Bit 1 Bit 0
PR1 PR0
V
RESET
18ms
System occur reset
Bit 1 Bit 0
PR1 PR0
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