IBM EM78P312N Specification page 25

External Interrupt
INT Pin
/INT0
INT1
INT3
/INT5
ADOSCR − AD Offset Control Register ( Address : 0Ch )
Bit 7
CALI
Bit 7 (CALI) : Calibration enable bit for A/D offset
CALI = "0" : disable Calibration
CALI = "1" : enable Calibration
Bit 6 ( SIGN ) : Offset voltage Polarity bit
Bit 5 ~ Bit 3 ( VOF[2] ~ VOF[0] ) : Offset voltage bits
IMR1 − Interrupt Mask Register 1 ( Address : 0Eh )
Bit 7
EXIE5
Bit 7 ( EXIE5 ) : External/INT5 pin Interrupt enable bit.
Bit 6 ( TCIE2 ) : Timer/Counter 2 Interrupt enable bit.
Bit 5 ( ADIE ) : ADC complete interrupt enable bit.
Bit 3 ( EXIE3 ) : External INT3 pin Interrupt enable bit.
Bit 2 ( TCIE4 ) : Timer/Counter 4 Interrupt enable bit.
Product Specification (V1.0) 10.03.2006
(This specification is subject to change without further notice)
Secondary
Function Pin
P60 ENI + INT0EN (IOCB)
P61 ENI + EXIE1 (IMR2)
P80, TC3 ENI + EXIE3 (IMR2)
P73, /SLEEP ENI + EXIE5 (IMR2)
Bit 6 Bit 5
SIGN VOF[2]
SIGN = "0" : Negative voltage
SIGN = "1" : Positive voltage
Bit 6 Bit 5
TCIE2 ADIE
EXIE5 = "0" : disable EXIF5 interrupt
EXIE5 = "1" : enable EXIF5 interrupt
TCIE2 = "0" : disable TCIF2 interrupt
TCIE2 = "1" : enable TCIF2 interrupt
ADIE = "0" : disable ADIF interrupt
ADIE = "1" : enable ADIF interrupt
EXIE3 = "0" : disable EXIF3 interrupt
EXIE3 = "1" : enable EXIF3 interrupt
TCIE4 = "0" : disable TCIF4 interrupt
TCIE4 = "1" : enable TCIF4 interrupt
Enable Condition
Falling
Rising or Falling
Rising or Falling or
Rising/Falling
Bit 4 Bit 3
VOF[1] VOF[0]
Bit 4 Bit 3
0 EXIE3
EM78P312N
8-Bit Microcontroller
Digital Noise
Edge
Reject
-
15/Fc, 63/Fc
7/Fc
- -
Bit 2 Bit 1 Bit 0
0 0
Bit 2 Bit 1 Bit 0
TCIE4 SPIE TCIE3
0
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