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7. GENERAL INFORMATION
7.1 PARTS
7.1.1 IC
UPD63702AGF
BA6797FM
LC89170M
BA05SFP
LB1930M
PM2007A
PD4905A
- Pin Functions (UPD63702AGF)
Pin No.
Pin Name
1
D.VDD
rst
2
3
AO
stb
4
sck
5
6
SO
7
SI
8
D.GND
9
X.GND
10
XTAL
xtal
11
12
X.VDD
13
DA.VDD
14
R+
15
R-
16,17
DA.GND
18
L-
19
L+
20
DA.VDD
21
D.VDD
22
FLAG
23
WDCK
24
C16M
25
EMPH
26
DIN
27
DOUT
28
SCKO
29
LRCK
30
TX
31
CTLV
32
POUT
33
D.GND
VCO
34
vco
35
36
D.VDD
37
PLCK
PD4931A
PD0236AM
PD6237B
SED1540F0A
SED1526F0A
PD5445A
AK7712AVT
I/O
Function and Operation
Supplies current of positive voltage to the logic circuits
I
System reset input pin
I
Microcomputer interface
AO="L": stb active and set to address register
AO="H": stb active and set to parameter
I
Signal to latch serial data within the LSI
I
Clock input pin to input and output serial data
O
Outputs serial data and status signal
I
Serial data input pin
Logic circuit GND
Crystal oscillation circuit GND
I
Crystal oscillator connection pin
O
Crystal oscillator connection pin
Supplies current of positive voltage to the crystal oscillation circuit
Supplies current of positive voltage to the D/A converter
O
Right channel analog audio data output pin
O
Right channel analog audio data output pin
D/A converter GND
O
Left channel analog audio data output pin
O
Left channel analog audio data output pin
Supplies current of positive voltage to the D/A converter
Supplies current of positive voltage to logic circuit
O
Flag output pin to indicate that audio data currently being output consists of
noncorrectable data
O
Pin to output double the frequency of LRCK
O
Pin to output the clock
O
Output pin for the pre-emphasis data in the sub-Q code
I
Input pin for serial audio data
O
Output pin for the serial audio data
O
Output pin for the clock for the serial audio data
O
Signals to distinguish the right and left channels of the audio data output
from DOUT. Frequency is 44.1kHz at 50% duty at normal regeneration
O
Output pin for the digital audio interface data
I
Oscillation control pin for high-frequency clock generation VCO used for the
digital PLL upon regeneration at fast speed of 2- or 4-fold
O
Output point for phase comparison
GND for the logic circuit
I
Input pin for the inverter
O
Output pin for the inverter
Supplies current of positive voltage to the logic circuit
O
Pin for monitoring the bit clock
DEH-P945R,DEX-P99R
GGC1325(M5M51016BTP-70LL)
TC7S08FU
AK4321VF
PM0017AM
NJM4580M
83
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