IBM BladeCenter HS22 Product Manual page 7

Versatile, easy-to-use blade optimized for performance, energy and cooling
Please see the Legal Information section for important notices and information.
In processors implementing Intel Hyper-Threading Technology, each core has two threads
capable of running an independent process. Thus, a 6-core processor can run 12 threads
concurrently.
Intelligent Power Capability powers individual processor elements on and off as needed, to
reduce power draw.
Execute Disable Bit functionality can help prevent certain classes of malicious buffer overflow
attacks when combined with a supporting operating system.
Intel's Virtualization Technology (VT) integrates hardware-level virtualization hooks that allow
operating system vendors to better utilize the hardware for virtualization workloads.
DDR3 Registered Memory with Chipkill ECC Protection
The HS22 uses registered double data rate III (DDR3) VLP (very-low-profile) DIMMs and
provides Active Memory features, including advanced Chipkill memory protection, for up to 16X
better error correction than standard ECC memory. In addition to offering triple the memory
bandwidth of registered or fully-buffered DDR2 memory, DDR3 memory also uses less energy.
1.8V DDR2 memory already offered up to 37% lower energy use than fully buffered memory.
Now, a generation later, 1.5V DDR3 memory is even more efficient, using 10-15% less energy
than DDR2 memory. For even greater efficiency, the HS22 also supports 1.35V DDR3 memory,
which uses up to 19% less energy than 1.5V DDR3 DIMMs.
The HS22 supports up to 192GB of memory in twelve DIMM slots. Redesign in the architecture
of the 5500 and 5600 series processors bring radical changes in the way memory works in these
servers. For example, the Xeon 5500 and 5600 series processors integrate the memory
controller inside the processor, resulting in two memory controllers in a two-socket system.
Each memory controller has three memory channels. Depending on the type of memory,
population of memory, and processor model, the memory may be clocked at 1333MHz, 1066MHz
or 800MHz.
Xeon 5600 / 5500
Processor 0
Memory Controller
Ch0 Ch1
5
1
2
6
Note: If only one processor is installed, only the first six DIMM slots can be used. Adding a
second processor not only doubles the amount of memory available for use, but also doubles the
number of memory controllers, thus doubling the system memory bandwidth. If you add a second
processor, but no additional memory for the second processor, the second processor has to
access the memory from the first processor "remotely," resulting in longer latencies and lower
performance. The latency to access remote memory is almost 75% higher than local memory
access. So, the goal should be to always populate both processors with memory.
The 1333MHz E56xx, L5640, and X56xx processor models support up to 1333MHz memory
clock speed and 2 DIMMs per channel (2DPC) at 1333MHz with single-rank and dual-rank
RDIMMs and UDIMMs running at 1.5V. Other 5600 series processors access memory at
1066MHz. The E550x models support memory at 800MHz only.
Running memory at 1333MHz (where supported) versus 1066MHz offers up to 9% better
performance, while running memory at 1066MHz produces up to 28% better performance than
memory running at 800MHz.
Xeon 5500 and 5600 series processors access memory with almost 50% lower latency than the
previous generation 5400 series processors. That can result in faster processing of latency-
sensitive workloads.
This new processor design comes with some trade-offs in memory capacity, performance, and
cost: For example, more lower-cost/lower-capacity DIMMs mean lower memory speed.
Alternatively, fewer higher-capacity DIMMs cost more but offer higher performance.
Regardless of memory speed, the Xeon 5500 platform represents a significant improvement in
Xeon 5600 / 5500
QPI
Ch2 Ch0
3 7
4 8
Processor 1
Memory Controller
Ch1 Ch2
11
9
10
12
7.