System Control Block Diagram - Sony DVP-S336 Service Manual

DVP-S336/S345/S360/S365/S560D/S570D/S745D

3-4. SYSTEM CONTROL BLOCK DIAGRAM

MB-86 BOARD (3/6)
(SEE PAGE 4-25 to 4-32)
HD 8 – 15
RF/SERVO
(SEE PAGE 3-4)
HA 0, 1
HA 0 – 21
HD 0 – 15
RD
WRH
SIGNAL PROCESSOR
(SEE PAGE 3-5)
ARPRST
ARINT
XARPCS
ARPWT
AVWT
XDRV MUTE
SDSPINT
RF/SERVO
XSDSPCS
(SEE PAGE 3-4)
CKSW1
OCSW1
OCSW2
WIDE
VIDEO
(SEE PAGE 3-11)
FS
DREQ0
DACK0
DREQ1
DACK1
IC1054
XAVDCS2
XAVDCS3
AVINT
5.2 Vp-p (27 MHz)
CD DOUT
SIGNAL PROCESSOR
(SEE PAGE 3-5, 6)
IC105 qh
27MAVD
DVD: 4.3 Vp-p (29.5 MHz)
CD: 4.3 Vp-p (22.58 MHz)
512FSAVD
IC105 qs
33MARP
33MAVD
4.9 Vp-p (33.8688 MHz)
RF/SERVO
27MSDP
(SEE PAGE 3-4)
05
IC104
HD 8 – 15 FLASH
HA 0, 1
HA 0 – 21 HA 0 – 21
HD 0 – 15 HD 0 – 15
1 – 5 102 – 109 111 – 118 120 85 – 100 65
CSOX
RD
WRH
INT2
CS5X
IC102 ua
CPUCK
XRST
4 Vp-p (25.3 MHz)
22 ARPRST INT3
26 INT1 ECS
69 CS4X EWC
SO0
79 XWAIT
SI0
IC102
SCO
SYSTEM
23 DRV MUTE CONTROL
32 INT7
18 CS6
56 CKSW1
57 OCSW1 IFCS
INT4
58 OCSW2
FRRST IN
AURST
63 WIDE DACCS1
DACCS0
MAMUTE
8 DACMUTE/FS
IC102 tf
CKSW2
CLAPBSY
43 DREQ0
44 DACK0 2.4 Vp-p (12.5 MHz) SC1
46 DREQ1 SO1
47 DACK1 KCS/39CS
SI1
67 CS2X
68 CS3X
25 INTO
61 53 54
X101
12.5MHz
IC105
PLL
4 27M2
44.1/48k
23 44.1/48k
512FS2
16 512FS1
12 33M
IC105 8,9
27M3
IN OUT
8 9
X102
2.5 Vp-p (27 MHz)
27MHz
3-7
RD
WRH
1 – 5
SHA0 – 3 19
82 11 RDN
83 10 WRN
FGAINT
27 12 INT
XFGACS
70 48 CS5
CPUCK
71 8 CK
XRST
16 9 XRST
28 1 R/B
49 3 CS
48 8 WC
IC101
35 5 DI
B+
33 6 DO EEPROM
(3.3V)
36 4 SK
SC0
SI0
SO0
XIFCS
45
IFBSY
29
XFRRST
74
AURST
51
6CH/VES CS
60
2CH CS
59
MAMUTE
62
39INT
30 107 CMD ACKNO
CMDREQ
31 108 CMD REQNO
SC1
39 115 SH CLKI
SO1
38 117 SH SII
KCS/39CS
50 118 SH CSNI
SI1
37 119 SH SOO
IC105 qg
IC701
AUDIO
DSP
DVD: 3.4 Vp-p (29.5 MHz)
CD: 3.4 Vp-p (22.58 MHz)
10 DSP1DII
32 DSP2DII
S560D/S570D/S745D
512FS6CH
512FS2CH/VES
512FS39
15 8 DSP1DIACKI
34 DSP2DIACKI
67 DSP2ACKI
149 DSPIACKI
27M39
24 22 SCLKI
IC105 wf
6 RESET NI
4.9 Vp-p (27.2 MHz)
IC802
NAND FLASH
15 – 18
D0 – 3
13
20 TEST, CLE, ALE, XWE,
ı
IC801 XWP, XCE, XRE, R/B
24
FGA 26
37
S570D/S745D
XRST
512FS6CH
A
512FS2CH/VES
IC103
SC1
5 4
SO1
RESET
SI1
SC0
SI0
SO0
XIFCS
XIFBUSY
XFRRST
AURST
6CH/VES CS
2CH CS
MA MUTE
6CH FRONT
DSP2 CH12O 48
6CH REAR
DSP2 CH34O 49
KCS/6CH C/SW
DSP2 CH56O 50
LRCK
DSP2 LRCKO 42
BCK
DSP2 BCKO 43
S336/S345/S360/S365
6CH FRONT
DSP2 CH12I 56
6CH REAR
DSP2 CH34I 57
6CH C/SW
DSP2 CH56I 58
DSP2 LRCKI 55
DSP2 BCKI 69
2CH DATA
DSP2 CH78O 51
SPDIF
DSP2 DO 45
S336/S345/S360/S365
DSP1 CH12I 160
DSP1 CH34I 159
DSP1 CH56I 158
DSP1 LRCKI 161
DSP1 BCKI 147
TDI 140
TMS 141
TCK 143
TRST 142
A
S560D/S570D/S745D
3-8
SIGNAL PROCESSOR
XRST
(SEE PAGE 3-5)
RF/SERVO
XRST
(SEE PAGE 3-4)
512 FS 6CH
512 FS 2CH/VES
AUDIO
SC1
(SEE PAGE 3-9)
SO1
SI1
SC0
SI0
INTERFACE
SO0
CONTROL
XIFCS
(SEE PAGE 3-13)
XIFBUSY
XFRRST
AURST
6CH/VES CS
2CH CS
MA MUTE
6CH FRONT
6CH REAR
KCS/6CH C/SW AUDIO
(SEE PAGE 3-9)
6CH LRCK
6CH BCK
BCK
6CH FRONT
6CH REAR
6CH C/SW
LRCK
LRCK
BCK
BCK
2CH DATA
INTERFACE
SPDIF
CONTROL
(SEE PAGE 3-13)
SPDIF1
ACH12
ACH34
ACH56
LRCK
SIGNAL PROCESSOR
BCK
(SEE PAGE 3-6)
TDI32
TMS
TCK
TRST