Table of Contents
Advertisement
IC BLOCK DIAGRAM & DESCRIPTION
IC597 TDA8921TH (2x50 Class-D Power Amplifier)
3
10
9
IN1-
INPUT
STAGE
8
IN1+
mute
11
SGND1
7
OSC
OSCILLATOR
6
MODE
MODE
SGND2
2
mute
IN2+
5
INPUT
STAGE
IN2-
4
1
12
V
2
V
1
SSA
SSA
SYMBOL PIN
1
negative analog supply voltage for channel 2
VSSA2
2
signal ground for channel 2
SGND2
3
positive analog supply voltage for channel 2
VDDA2
4
negative audio channel 2 input
IN2-
5
positive audio channel 2 input
IN2+
6
mode select input : (standby, mute or operationg)
MODE
7
oscillator frequency adjustment or tracking input
OSC
8
positive audio channel 1 input
IN1+
9
negative audio channel 1 input
IN1-
10
positive analog supply voltage for channel 1
VDDA1
11
signal ground for channel 1
SGND1
12
negative analog supply voltage for channel 1
VSSA1
IC601 PT6315 (VFD Driver / Controller IC)
DIN
7
Serial
6
DOUT
Data
CLK
8
Display Memory
Interface
(24 bits x 17 Words)
STB
9
TI~inc Generator
OSC
5
OSC
Key Moter Memory
1
LED1
LED
2
LED2
Driver
3
LED3
LED4
4
K1
18
13
RELEASE1
PWM
SWITCH1
MODULATOR
ENABLE1
STABI
TEMPERATURE SENSOR
MANAGER
CURRENT PROTECTION
ENABLE2
PWM
SWITCH2
MODULATOR
RELEASE2
24
19
V
HW
SSD
DESCRIPTION
Control
Driving Circuit
10
11
13
30
K2
VDD
GND
VEE
23
DRIVER
HIGH
CONTROL
AND
HANDSHAKE
DRIVER
LOW
V
V
DRIVER
HIGH
CONTROL
AND
HANDSHAKE
DRIVER
LOW
17
V
1
V
SSP
SYMBOL PIN
PROT
13
time constant capacitor for protection delay
VDDP1
14
positive power supply voltage for channel 1
BOOT1
15
bootstrap capacitor for channel 1
OUT1
16
channel 1 PWM output
VSSP1
17
negative power supply voltage for channel 1
STABI
18
decouping capacitor of internal stabilizer for logic supply
HW
19
handle wafer ; must be connected to VSSD
VSSP2
20
negative power supply voltage for channel 2
OUT2
21
channel 2 PWM output
BOOT2
22
bootstrap capacitor for channel 2
VDDP2
23
positive power supply voltage for channel 2
VSSD
24
negative digital supply voltage
14
SG1/KS1
15
SG2/KS2
16
SG3/KS3
Pin Name
17
SG4/KS4
LED1 to LED4
18
SG5/KS5
19
SG6/KS6
Segment
20
SG7/KS7
Driver
21
SG8/KS8
22
SG9/KS9
Grid
Driver
23
SG10/KS10
24
SG11/KS11
Key Scan
25
SG12/KS12
Output
(Schmitt Trigger)
26
SG13/KS13
27
SG14/KS14
28
SG15/KS15
(Schmitt Trigger)
30
SG16/KS16
31
SG17/GR12
(Schmitt Trigger)
32
SG18/GR11
33
SG19/GR10
34
SG20/GR9
35
SG21/GR8
36
SG22/GR7
37
SG23/GR6
38
SG24/GR5
SG1/KS1 to
SG16/KS16
42
GR1
41
GR2
Grid
SG17/GR12 to
Driver
40
GR3
SG24/GR5
39
GR4
GR4 to GR1
- 15 -
14
15
BOOT1
16
OUT1
V
24
SSD
V
2
23
DDP
BOOT2
22
1
SSP
OUT2
21
20
V
2
SSP
2
SSP
HW
19
TDA8921TH
22
BOOT2
STABI
18
17
V
1
SSP
21
16
OUT2
OUT1
15
BOOT1
14
V
1
DDP
PROT
13
20
2
SSP
DESCRIPTION
I/O
Description
O
LED Output Pin
Oscillator Input Pin
OSC
I
A resistor is connected to this pin to
determinc the oscillation frequency
Data Output Pin (N-Channel, Open-Drain)
DOUT
O
This pin outputs scrial data at the falling
edge of the shift clock
(starting from the lower bit)
Data Input Pin
DIN
I
This pin inputs serial data at the rising cdge
of the shift clock (starting from the lower bit)
Clock Input Pin
CLK
I
This pin reads serial data at the rising cdge
and outputs data at the falling cdge.
Serial Interface Strobe Pin
STB
The data input after the STB has fallen is
I
processed as a command.
When this pin "HIGH",CLK is ignored,
Key Data Input Pins
K1 to K2
I
The data inputted to these pins are fatched
at the end of the display cycle.
VSS
-
Logic Ground Pin
VDD
-
Logic Power Supply
High-Voltage Segment Output Pins
O
Also acts as the Key Source
-
Pull-Down Level
VEE
O
High Voltage Segment/Grid Output Pins
O
High-Voltage Grid Output Pins
1
V
2
SSA
2
SGND2
V
2
3
DDA
4
IN2-
5
IN2+
6
MODE
7
OSC
8
IN1+
9
IN1-
10
V
1
DDA
11
SGND1
12
V
1
SSA
Pin No.
1 to 4
5
6
7
8
9
10, 11
12, 44
13, 43
14 to 29
30
31 to 38
39 to 42
Hide quick links:
Advertisement
Table of Contents
