Mono Board: Circuit Diagram (Part 2) - Philips HTS3300/98 Service Manual

Circuit Diagram and PWB Layout

Mono Board: Circuit Diagram (Part 2)

1 2
A
7200
M24C16-RDW6
1
2
3
B
T237
MA(0:11)
3210-1
1 8 10R
MA(0)
3211-4
4 5 10R
MA(1)
3211-3
3 6 10R
MA(2)
C
3211-2
2 7 10R
MA(3)
3212-1
1 8 10R 23
MA(4)
0
24
3212-2 1
2 7 10R 25
MA(5)
2
26
3212-3 3
3 6 10R 29
MA(6)
4
30
3212-4 5
A
4 5 10R 31
MA(7)
6 1M-1
32
3213-1 7
1 8 10R 33
MA(8)
8
34
3213-2 9
2 7 10R 22
MA(9)
10
D 35
3210-2 11
10R
2 7
MA(10)
3213-3
MA(11) 3 6 10R
20
0
3210-4
4 5 10R 21 BA
BA0 1
3210-3
10R
3 6 38
BA1 CLK
37
CKE
3211-1
1 8 10R 19
DCLK CS
18
RAS
3213-4
4 5 10R
17
DCKE
CAS
16
WE
3214-1
1 8 10R
CS
E
3214-2
2 7 10R
RAS
3214-3
3 6 10R
CAS
3214-4
4 5 10R
WE
7203
F
M29W160ET70
A(0:21)
25
A(1)
24
A(2)
23
A(3)
22
A(4)
21
A(5)
A(6) 20
19
A(7)
A(8) 18
8
A(9)
A(10) 7
G 6
A(11)
5
A(12)
4
A(13)
3
A(14)
2
A(15)
1
A(16)
48
A(17)
17
A(18)
A(19) 16
4201 9
A(20)
3240
+3V3_FL
15
10K
12
+3V3_FL
H 11
PWR
28
PRD
26
PCE
47
1 2
HTS3300
3 4 5
+3V3_D
2252
T236
100n
F
3203 3K3
(2Kx8) 7
+3V3_D
WC
EEPROM
T202
6
0 SCL SCL_DAC
1 ADR
T203
5
2 SDA
SDA_DAC
3209 3K3
+3V3_D
D
5200
+3V3_D
2253 100n
2254 100n
2255 100n
2256 100n
2257 100n
2258 47u
16V
VDD VDDQ
F
36
DRAM
NC 40
1M X 16 X 4
DQ(0:15)
0
2
DQ(0)
0
4 DQ(1)
1
5
DQ(2)
2
7
DQ(3)
3
8
7201 DQ(4)
4
IS42S16400A 10
DQ(5) # SPDIF
5
11
DQ(6)
6
13
DQ(7)
D 7
42 DQ(8)
8
44
DQ(9)
9
45 DQ(10)
10
47
DQ(11)
11
48 DQ(12)
12
50
DQ(13)
13
51 DQ(14)
14
53
DQ(15)
15
39
H DQM1
DQM 15
VSS VSSQ L
DQM0
D
3233 10R
+3V3_FL
+3V3_D
SPDIF_IN
T238 2267 47u
16V
VDD
2268 100n
AD(0:7)
29
AD(0)
0 0
[FLASH]
31
AD(1)
1 1
2Mx8/1Mx16 SPMCLK
33
AD(2)
2 2
35
AD(3)
3 3
38
AD(4)
4 4
40
AD(5)
5 5
42
AD(6)
6 6
44 AD(7)
7 7
D 30
8 8
32
0
9 9
A 34
10 10
2M-1 / 1M-1
36
11 11 SP_RST
39
12 12
41
13 13
43
14 14
45
A(0)
15 15
16 A-1
17
18
19 19
13 *
3241 33R
14
NC +3V3_FL
10
RB A(21)
RP
WE
OE
CE
BYTE
VSS
D
3 4 5
7. EN 20
6 7 8
D D
5201 5202
T240
+5D
+5D
7202
CS8415A
3227 22R
26 17
RXP6 OLRCK
T204
3229 22R
25 16
RXP5 OSCLK
T205
3231 22R
15 18
RXP4 SDOUT
T200
14
RXP3
13
RXP2
21
OMCK
12
RXP1
D
2266 100n
4
RXP0
5 1
SDA_DAC
RXN0 SDA|CDOUT
2269 100n
2
AD0|CS_
D D
28
SCL_DAC
SCL|CCLK
22R 3235
10
RMCK
27
+5VS
AD1|CDIN
19
INT
20
U
3236 10K
3
EMPH_
D
11
RERR
T201
9 24
RST_ H|S_
D
3237 10K
+5D
3238 1K2
D D
6 7 8
9 10 11
# 3200 10K
+5D
RDS_DAT
RDS_CLK
# 3201 10K
+5D
(1389-177) ERR
3202 10K
+3V3_D
SPDIF_IN
3204 10K
+5D
TU_SD
SDA_DAC
SCL_DAC
PCM_CLfe
PCM_LsRs
PCM_LR
D
PCM_LRCK
PCM_MCLK
PCM_SCLK
SPLRCK
SPBCK
PCM_MIC_IN
SPDATA
D
* OPTIONAL
# Refer to Table
3139 243 31484_sh2.pdf_051305
9 10 11
12 2252 A4
2253 C4
2254 C4
2255 C4
2256 C4
2257 C4
2258 C4
2259 D10
2260 D11
2261 D10
RDS_DAT
2262 D10
2263 D11
A
RDS_CLK 2264 D7
2265 D7
2266 F6
ERR
2267 F4
2268 F4
2269 F6
SPDIF_IN
2270 F10
2271 F11
2272 H7
2273 H7
2274 F10
2275 F11
B
2276 F5
3200 A10
3201 A10
3202 A10
3203 B4
3204 B10
TU_SD
3209 B4
3210-1 C2
SDA_DAC
3210-2 D2
3210-3 D2
SCL_DAC
3210-4 D2
PCM_CLfe
3211-1 E2
C
3211-2 C2
PCM_LsRs
3211-3 C2
3211-4 C2
PCM_LR
3212-1 C2
3212-2 C2
3212-3 C2
3212-4 D2
3213-1 D2
3213-2 D2
3213-3 D2
3213-4 E2
D
3214-1 E2
3214-2 E2
3214-3 E2
3214-4 E2
3227 E8
3229 E8
PCM_LRCK
3231 E8
3233 F4
3234 F6
PCM_MCLK
3235 F6
3236 G6
PCM_SCLK
3237 G6
E
3238 G7
3240 H2
PCM_MIC_IN
3241 H4
4201 H2
5200 B4
5201 E6
5202 E8
7200 A3
7201 D3
7202 E7
7203 F3
F T200 E8
T201 G6
T202 B4
T203 B4
T204 E8
T205 E8
T236 A3
T237 B3
T238 F3
T240 E7
G
H
12