Sony RCD-W3 Service Manual page 45

• IC207 CST0100C (CPLD) (BD-R BOARD (3/6))
Pin No. Pin Name
1 17MHz
2 RESAMP2
3 WFPDSH
4 GND
5 RFPDSH
6 WBLSH
7 SPDSH
8 MPDSH
9 TDI
10 TMS
11 TCK
12 WRSMP
13 WLDON
14 ERGCNT
15 VCC
16 RESET
17 GND
18 W/XR
19 OSCEN
20 ENBL
21 ODON
22 MONITO
23 LDON
24 TDO
25 GND
26 VCC
27 WGATE
28 HFM ON
29 EFM1
30 EFM2
31 HFSW
32 ROPCON
33 CDR/RW
34 WR/RE
35 VCC
36 ATIP/EFM
37 WBLOCK
38 ADTRIG
39 EEFS
40 EFM3
41 ROPC1
42 RESAMP1
43 EFCK
44 34MCLK
I/O
— Test point (17MHz CLK)
I Timing signal input for OTI9790CE
O Sample & hold signal of CXA3558R
— Ground
O Sample & hold signal of CXA3558R
O Sample pulse output for CXA3558R
O Sample pulse output for CXA3558R
O Sample pulse output for CXA3558R
— Not used
— Not used
— Not used
I Timing signal input for OTI-9790CE
O WLDON of RFIC & PICK-UP signal output
O Gain control signal output (Not used)
— Power supply (+5V)
I Reset signal input
— Ground
O Write enable1 signal output
O Oscillation enable signal output to pick-up
O Signal to turn on the pick-up
O Over drive enable signal output
I Monitoring signal input
I Laser diode ON/OFF control signal input
— Not used
— Ground
— Power supply (+5V)
I WGATE signal input from OTI9790CE
— Not used (connected to VCC)
I WE1 control signal from OTI9790CE
I ODON control signal from OTI9790CE
I HFSW signal input from OTI9790CE
I ROPCON signal input from HD64F3062BFBL-W3CDR
I CDR/RW detect signal input
I REAL_WRITE signal input
— Power supply (+5V)
I WBLOCK signal control input
— Not used
O ADTRIG signal output to HD64F3062BFBL-W3CDR
I Sync signal input from OTI9790CE
I OSCEN control signal while reading
I Determines ROPC S/H timing when writing
I S/H Level input from OTI9790CE
I Generating S/H control signal according to EFM bit clock and other signals
I Clock input OTI9790CE
Description
RCD-W3
45