Sony DVP-CX985V Service Manual page 121

Pin No. Pin Name
123 WCK
WAVDD0,
124, 125
WAVDD1
126 WARFI
127 WAVRB
128, 129 WAVSS0, WAVSS1
130 VSIO
131 to 134 DQ7 to DQ4
135 VDIO
136 to 139 DQ3 to DQ0
140 VSIOA3
141 DCLK
142 DCKE
143 XWE
144 XCAS
145 XRAS
146 VDIO
147 TESTO
148, 149 A11, A10
150 VSC
151, 152 A9, A8
153 VDC
154 to 157 A7 to A4
158 VSIO
159 to 162 A3 to A0
163 VDIO
164 XSRQ
165 XSHD
166 SDCK
167 XSAK
168 SDEF
169 to 176 SD0 to SD7
I/O
I Operation clock signal input for PSP physical disc mark detection from the DSP
—
A/D power supply terminal (+2.5V) (for PSP physical disc mark detection)
I
Analog RF signal input for PSP physical disc mark detection from the RF amplifier
I
A/D bottom reference terminal for PSP physical disc mark detection
—
A/D ground terminal (for PSP physical disc mark detection)
— Ground terminal (for I/O)
I/O
Two-way data bus with the SD-RAM
—
Power supply terminal (+3.3V) (for I/O)
I/O
Two-way data bus with the SD-RAM
— Ground terminal (for I/O)
O
Clock signal output to the SD-RAM
O
Clock enable signal output to the SD-RAM
O
Write enable signal output to the SD-RAM
O Column address strobe signal output to the SD-RAM
O
Row address strobe signal output to the SD-RAM
—
Power supply terminal (+3.3V) (for I/O)
O
Output terminal for the test
O Address signal output to the SD-RAM
—
Ground terminal (for core)
O
Address signal output to the SD-RAM
—
Power supply terminal (+2.5V) (for core)
O Address signal output to the SD-RAM
—
Ground terminal (for I/O)
O
Address signal output to the SD-RAM
—
Power supply terminal (+3.3V) (for I/O)
O Stream data bus request signal output to the DSP
I
Stream data bus header flag signal input from the DSP
I
Stream data bus clock signal input from the DSP
I
Stream data bus acknowledge signal input from the DSP
I Stream data bus error flag signal input from the DSP
I
Stream data signal input from the DSP
Description
DVP-CX985V
121