Sony ICD-UX71 Service Manual page 26

ICD-UX71/UX71F/UX81/UX81F/UX91F
MAIN BOARD IC5001 LC823403B-08B-E (SYSTEM CONTROL, D/A CONVERTER)
Pin No. Pin Name
B2 TEST1
A1 TEST2
C2 TEST3
B1 TEST4
D2 TEST5
C1 TEST6
C3 TCK
D3 RTCK
D1 NTRST
E2 EXA16(A15)
D4 TDI
E3 EXA15(A14)
E1 EXA14(A13)
F2 TMS
E4 EXA13(A12)
E5 EXA12(A11)
F3 TDO
F1 NRES
G2 EXA11(A10)
F4 Vdd1
F5 EXA10(A9)
G3 Vss
H2 EXA9(A8)
G1 Vdd2
G4 EXA20(A19)
G5 NCS0
H3 EXA21(P2E)
H1 NCS1
J2 NWRENWRL/NWE
H4 NCS2(P20)
J1 NCS3(P10)
H5 NRESET
K2 NLBEXA0
K1 NHBNWRH
J3 PHI(P11)
J4 EXA19(A18)
K3 EXA18(A17)
L2 EXTFIQ(P2F)
L1 SCK0
K4 EXA8(A7)
J5 EXA7(A6)
M1 SDO0
M2 EXA6(A5)
L3 SDI0
L4 Vdd1
K5 EXA5(A4)
M3 Vss
N1 EXA4(A3)
N2 Vdd2
P1 EXA3(A2)
N3 EXA2(A1)
26
I/O
I Test pin 1
I Test pin 2
I Test pin 3
I Test pin 4
I Test pin 5
I Test pin 6
I JTAG test clock signal input
O JTAG test returned clock signal output
I JTAG test reset signal input
O External memory address bit 16 signal output
I JTAG test data signal input
O External memory address bit 15 signal output
O External memory address bit 14 signal output
I JTAG test mode select signal input
O External memory address bit 13 signal output
O External memory address bit 12 signal output
O JTAG test data signal output
I Reset signal input
O External memory address bit 11 signal output
— Digital power supply pin (+1.0V)
O External memory address bit 10 signal output
— Digital ground pin
O External memory address bit 9 signal output
— Digital power supply pin (+3.1V)
O External memory address bit 20 signal output
O External memory chip select signal output 0
O External memory address bit 21 signal output
O External memory chip select signal output 1
O External memory write/external memory write low byte signal output
O External memory chip select 2 signal output
O External memory chip select 3 signal output
I Flash reset signal input
External memory address bit 0/external memory low byte select signal output
O
Not used in this set. (Open)
External memory write/external memory write high byte signal output
O
Not used in this set. (Open)
O AHB bus clock signal output (32.768kHz)
O External memory address bit 19 signal output
O External memory address bit 18 signal output
I External FIQ interruption signal input
O Serial interface 0 clock signal output
O External memory address bit 8 signal output
O External memory address bit 7 signal output
O Serial interface 0 data signal output
O External memory address bit 6 signal output
I Serial interface 0 data signal input
— Digital power supply pin (+1.0V)
O External memory address bit 5 signal output
— Digital ground pin
O External memory address bit 4 signal output
— Digital power supply pin (+3.1V)
O External memory address bit 3 signal output
O External memory address bit 2 signal output
Description
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR chip select signal output
NOR address line signal output
Not used in this set. (Open)
LCD chip select signal output
RTC chip select signal output
Not used in this set. (Open)
FM DX/Local change signal output
NOR address line signal output
NOR address line signal output
Not used in this set. (Open)
RTC/LCD clock signal output
NOR address line signal output
NOR address line signal output
RTC/LCD data signal output
NOR address line signal output
RTC data signal input
NOR address line signal output
NOR address line signal output
NOR address line signal output
NOR address line signal output