Schematic Diagram -Main Section (1/3) - Sony ICD-UX71 Service Manual

4-8. SCHEMATIC DIAGRAM – MAIN Section (1/3) –
1 2 3
MAIN BOARD (1/3)
A
B
MAIN
CPU_VDD_3.1
11
BOARD
DGND
(3/3)
CPU_VDD_1.0
(Page 21)
FL5001
C
CPU_VDD_3.1
MAIN
12
BOARD
(2/3)
(Page 20)
D[0-15]
D CPU_ROUT
CPU_LOUT
CPU_PLL2_2.8
IC B/D
IC5003
REG
IC5003
XC6213B152GR
E
VIN
UNREG_2.4
VOUT
CE
VSS
C5035
0.1u
DGND
(CPU_DAMP_GND)
F
DP
DM
G
KEY_AD0
MAIN
KEY_AD1
13
BOARD
(3/3)
(Page 21) DPC
BATT_LEVEL
BATT_CHARGE_LEVEL
VBUS
R5039
100k
H 0
R5038 C5034
47k 0.1u
Q5004
LSK3541FS8T2L
VBUS DETECT
0
1
3.2
2
HOLD LSK3541FS8T2L
R5041
3
1M
I
TRST
JL5006
JL5007
TMS
JL5008
JTAG TCK
JL5009
RTCK
JL5010
TDO
JL2011
RES
JL5012
J
LCD_A0
CS2
CS3
K
A[0-19]
MAIN RES
14
BOARD
(2/3) NWRENWRL
(Page 20)
L
DGND
RD
CS0
M
N
ICD-UX71/UX71F/UX81/UX81F/UX91F
• See page 24 for IC Block Diagram. • See page 26 for IC Pin Function Description of IC5001.
4 5 6 7
C5007 X5000
8p 12MHz
R5014
1M
C5021 C5027 C5022 C5025 C5032
R5012
0.1u 0.1u 0.1u 0.1u 0.1u C5008
0
8p
B15 B16 C14 D14 C15
C5001
C5002
1u VDD1
0.1u
AVDDPLL2
C5033 0.1u
AVSSPLL2
VCNT2
C5000 R5006 AVSSDAMP
0.1u 150
ROUT
0.5%
AVDDDAMP
C5003
C5004
AVDDDAMP
220u
0.1u
LOUT
4V
AVSSDAMP
C5005 0.1u
AVDDPHI1
AVSSPHY1
AVSSPHY2
R5003 680 0.5%
RREF
AVSSPHY2
AVDDPHY2
AVDDPHY2
C5016
AVSSPHY2
0.1u
AVSSPHY2
AVSSPHY2
AVDDPHY2
DP
DM
AVSSPHY2
AVDDPHY2
AVDDADC
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
2.9
1 R5066 AN9
470k
2
AVSSADC
3 R5008
470k
R5040
470k
Q5001
HOLD DETECT
TDI
B2 A1 C2 B1 D2
R5000
1M
R5011
22k
JL5029 JL5030
1 3.1 3.1 3.1
2 1 2 1
IC5002
IC5000 IC5000
RESET
PST8209UL
RESET
IC5002
PST8227UL
3 4 3 4
8 9 10 11
R5024 470
L5002
220nH
C5038 C5037
1p 10p
R5017
150 C5012
0.5% 0.1u
R5075
0
R5026
C16 F13 E14 D15 D16 E15 E16 G12 F14 F16 F15 G13 G14 G16 G15 H14 H12 H16 H15 H13 J14 J13 J16 J12 J15 K14 K16 K13 K12 K15 L16 L14 L13 L15 M16 L12 M14 M13 M15 N16 M12
IC5001
IC5001
LC823403B-08B-E
SYSTEM CONTROL,D/A CONVERTER
CSP(CHIP SIDE PACKAGE)
C1 C3 D3 D1 E2 D4 E3 E1 F2 E4 E5 F3 F1 G2 F4 F5 G3 H2 G1 G4 G5 H3 H1 J2 H4 J1 H5 K2 K1 J3 J4 K3 L2 L1 K4 J5 M1 M2 L3 L4 K5
RB5001
470kX4
R5020 10
R5021
1M
R5018
1M
JL5028 JL5027
19 19
When IC5001 on the Main board is damaged, exchange the
new Main board for the Main board which IC damaged.
12 13 14 15
R5028
470
R5025 10
10 R5048 470k
Q5002
LSK3541FS8T2L
1
AIRQ SWITCH
2
3
N14 P16 N13 N15 P14 R16 P15 T16 R15
R5030
470k
BACKUPB
RTCINT
VDET
XIN32K
XOUT32K
VSSRTC
VDDRTC
SDAT4
SDAT3
SDAT2
SDAT1
SDCLK
SDCMD
SDCD
SDWP
Vdd2
Vss
Vdd1
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
XFBSY
XFWP
XFCE0
XFCE1(P1F)
XCLE
XALE
XFRE
XFWE
Vdd2
Vss
Vdd1
XFCE3(P07)
XFCE2(P06)
PO5
PO4
PO3
PO2
R5072 R5034 100k
PO1
0
PO0
RXD0(P1E)
TXDO(P1D)
TIOCB1(P1C)
TIOCA1(P1B)
TIOCB0(P1A)
Vdd1 JL5025 Q5005
3.1 0
TIOCA0(P19) 2SJ0674G0LS0
R5071
TCLKB(P18) CHARGE DETECT
3.1
100k
TCLKA(P17)
RXD1(P2B)
R5070
470k
M3 N1 N2 P1 N3 P2 M4 L5 R1
R5002 EXCEPT
100k
LA MODEL
0.5%
C5009
0.1u
ICD-UX71/UX71F/UX81/UX81F/UX91F
16 17 18 19
MAIN
FD[0-7] (Page 20)
15
BOARD
NAND_CNT
(2/3)
SDA
SCL
LRCK
BCK
DATA
BACKLIGHT
HP_INSERT
MIC_INSERT
KEY_WAKEUP
FM_INT
DOUT
AIRQ
CPU_32K
FD[7]
FD[6]
FD[5]
FD[4]
FD[3]
FD[2]
FD[1]
MAIN
FD[0]
16
BOARD
R/B
(3/3)
WP (Page 21)
CE0
CE1
CLE
ALE
RE
WE
MUTE
LCD_RESET
CHARGE_MEASURE_ON
CHARGE_ON
FM_POWER_ON
AUDIO_POWER_ON
CPU_POWER_ON
JL5013
RXD
JL5014
TXD
LED_G
LED_R
DAMP_SEL
EXCEPT LA MODEL
CPU_V
SP_SHDN
BATT_LEVEL_MEASURE
SP/HP_SEL
SDI1
SDO1
SCK1
SDI0
SDO0
SCK0
DX/LO