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The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.
This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8DSP-8/H8DSP-i serverboard. The H8DSP-8/H8DSP-i is based on the ServerWorks HT-2000/1000 chipset and supports single or dual AMD Opteron processors (single or dual core) in 940-pin microPGA ZIF sockets and up to 32 GB of DDR266/200 or 16 GB of DDR333/400.
Please check that the following items have all been included with your serverboard. If anything listed here is damaged or missing, contact your retailer. One (1) H8DSP-8 or H8DSP-i serverboard One (1) IDE cable (CBL-036) One (1) fl oppy cable (CBL-022)
H8DSP-8/H8DSP-i User’s Manual Figure 1-1. H8DSP-8/H8DSP-i Image Note: the H8DSP-8 is pictured. The H8DSP-i shares the same layout but without SCSI controllers, jumpers or connectors.
Chapter 1: Introduction Serverboard Features • Single or dual AMD Opteron 200 series 64-bit processors in 940-pin microPGA ZIF sockets Memory • Eight dual/single channel DIMM slots supporting up to 32 GB of registered ECC DDR266/200 or up to 16 GB of registered ECC DDR400/333 SDRAM Note: Memory capacities are halved for single CPU systems.
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• Internal/external modem ring-on Onboard I/O • Adaptec AIC-7902W SCSI controller for dual-channel Ultra320 SCSI, RAID 0, 1, 10 and JBOD supported (H8DSP-8 only) • One (1) ATA100 IDE port • One (1) fl oppy port interface (up to 2.88 MB) •...
H8DSP-8/H8DSP-i User’s Manual Chipset Overview The H8DSP-8/H8DSP-i serverboard is based on a Serverworks' chipset composed of two main components: the HT-2000 HyperTransport SystemI/O controller and the HT-1000 HyperTransport SystemI/O Hub. The HT-2000/1000 chipset provides high performance, scalability and reliability. Its HyperTransport architecture reduces IO bottlenecks to improve overall system performance.
Chapter 1: Introduction PC Health Monitoring This section describes the PC health monitoring features of the H8DSP-8/H8DSP-i. The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for the CPU core voltages, +2.5V, +5V, +1.2V, ±12V and Battery Voltage...
H8DSP-8/H8DSP-i User’s Manual Power Confi guration Settings This section describes the features of your serverboard that deal with power and power settings. Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests.
CPU, some are inadequate. A 2 amp current supply on a 5V Standby rail is strongly recommended. Note that the power supply connectors on the H8DSP-8/H8DSP-i are of a proprietary design and require a proprietary power supply for proper connection.
H8DSP-8/H8DSP-i User’s Manual Super I/O The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock genera- tor, drive interface control logic and interrupt and DMA logic.
Chapter 2: Installation Chapter 2 Installation Static-Sensitive Devices Electric Static Discharge (ESD) can damage electronic com ponents. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally suffi cient to protect your equipment from ESD. Precautions •...
H8DSP-8/H8DSP-i User's Manual Processor and Heatsink Installation Exercise extreme caution when handling and installing the proces- sor. Always connect the power cord last and always remove it be- fore adding, removing or changing any hardware components. Installing the CPU Backplates Two CPU backplates (BKT-0004) are optional items that may be included in the retail box.
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Chapter 2: Installation 4. With the CPU inserted into the socket, inspect the four corners of the CPU to make sure that it is properly installed and fl ush with the socket. 5. Gently press the CPU socket lever down until it locks in the plastic tab. For a dual-processor system, repeat these steps to install another CPU into the CPU#2 socket.
1. Check the compatibility of the serverboard ports and the I/O shield The H8DSP-8/H8DSP-i serverboard requires a chassis that can support extended ATX boards 9.6" x 16.2" in size. Make sure that the I/O ports on the serverboard align with their respective holes in the I/O shield at the rear of the chassis.
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Chapter 2: Installation Support The H8DSP-8/H8DSP-i supports single or dual-channel, registered ECC DDR400/333/266/200 SDRAM. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots (see note on previous page and charts on following page). The CPU2 DIMM slots can only be accessed when two CPUs are installed (however, the CPU2 DIMM slots are not required to be populated when two CPUs are installed).
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H8DSP-8/H8DSP-i User's Manual Populating Memory Banks for 128-bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B Notes: X indicates a populated DIMM slot. If adding four DIMMs (with two CPUs in- stalled), the confi...
Chapter 2: Installation I/O Port and Control Panel Connections The I/O ports are color coded in conformance with the PC99 specifi cation to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3.
Defi nition Pin # Defi nition Connector Ground Ground Ground The primary power supply connector Ground (J43) on the H8DSP-8/H8DSP-i is a +3.3V Ground proprietary design with unique pinouts +3.3V Ground and requires the correct proprietary +5VSB Ground power supply to operate. Refer to the...
Chapter 2: Installation HDD LED HDD LED The HDD (IDE Hard Disk Drive) LED Pin Defi nitions (JF1) connection is located on pins 13 and Pin# Defi nition 14 of JF1. Attach the IDE hard drive LED cable to display disk activity. HD Active Refer to the table on the right for pin defi...
H8DSP-8/H8DSP-i User's Manual Power Fail LED Power Fail LED Pin Defi nitions (JF1) The Power Fail LED connection is lo- Pin# Defi nition cated on pins 5 and 6 of JF1. See the table on the right for pin defi nitions.
Chapter 2: Installation USB2/3 Headers Extra Universal Serial Bus Headers Pin Defi nitions (USB2/3) Tw o a d d i t i o n a l U S B 2 . 0 h e a d - USB2 USB3/4 Pin # Defi...
H8DSP-8/H8DSP-i User's Manual Power LED/Speaker PWR LED Connector Pin Defi nitions (JD1) Pin# Defi nition On JD1, pins 1, 2, and 3 are for the +Vcc power LED and pins 4 through 7 are for the speaker. See the tables on the -Vcc right for pin defi...
Chapter 2: Installation DOC Power Header DOC Power Header Pin Defi nitions (JWF1) Pin# Defi nition JWF1 is a power header for a DOC (Disk-On-Chip) device. Connect the appropriate cable here to provide Ground power to a DOC device on your sys- Signal tem.
H8DSP-8/H8DSP-i User's Manual Jumper Settings Explanation of Jumpers To modify the operation of the Connector serverboard, jumpers can be used to Pins choose between optional settings. Jumpers create shorts between two pins to change the function of the Jumper connector. Pin 1 is identifi ed with a square solder pad on the printed circuit board.
Chapter 2: Installation PCI-X#1/#2 Frequency Select PCI-X#1/#2 Frequency Select Jumper Settings Jumpers JXAO and JXBO are used (JXAO/JXBO) to set the speed of PCI-X slots 1 and Jumper Setting Defi nition 2, respectively. The recommended Pins 1-2 66 MHz PCI-X (default) setting is open for Auto.
H8DSP-8/H8DSP-i User's Manual SCSI Controller Enable/ Disable (H8DSP-8 only) SCSI Enable/Disable Jumper Settings (JPA1) Jumper JPA1 is used to enable or dis- Both Jumpers Defi nition able the Adaptec AIC-7902W SCSI Pins 1-2 Enabled controller. The default setting is on pins...
Chapter 2: Installation C to PCI Enable/Disable C1/2 pair of jumpers allow you to connect the System Management Bus C to PCI Enable/Disable Jumper Settings to any one of the PCI slots. The default C1/JI setting is closed for both jumpers to en- Jumper Setting Defi...
H8DSP-8/H8DSP-i User's Manual SCSI Activity LEDs (H8DSP- SCSI Channel Activity LEDs 8 only) (DA1/DA2) State System Status There are two SCSI activity LEDs on SCSI Channel Active the serverboard. When illuminated, SCSI Channel Inactive DA1 indicates activity on SCSI chan- nel A and DA2 indicates activity on SCSI channel B.
Chapter 2: Installation Floppy, IDE, SCSI and SATA Drive Connections Use the following information to connect the fl oppy and hard disk drive cables. The fl oppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1. A single fl...
H8DSP-8/H8DSP-i User's Manual IDE Connectors IDE Drive Connectors Pin Defi nitions (JIDE#1) Pin# Defi nition Pin # Defi nition There are no jumpers to con- fi gure the onboard IDE connec- Reset IDE Ground tor. See the table on the right...
H8DSP-8/H8DSP-i User's Manual SATA 4-Port Connector Pin Defi nitions (JSM1) SATA Connector Pin# Defi nition Pin # Defi nition Ground RXD+ There are no jumpers to con- RXD- Ground figure the SATA connector. TXD- TXD+ JSM1 is a 4-port connector that...
Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components.
H8DSP-8/H8DSP-i User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed.
Frequently Asked Questions Question: What type of memory does my serverboard support? Answer: The H8DSP-8/H8DSP-i supports up to 32 GB of registered ECC DDR266/200 or up to 16 GB of registered ECC DDR400/333 interleaved or non- interleaved SDRAM with two CPUs installed. With only one CPU installed the maximum memory support is halved.
H8DSP-8/H8DSP-i User's Manual Question: Why can't I turn off the power using the momentary power on/off switch? Answer: The instant power off function is controlled in BIOS by the Power But- ton Mode setting. When the On/Off feature is enabled, the serverboard will have instant off capabilities as long as the BIOS has control of the system.
Chapter 4 BIOS Introduction This chapter describes the AMIBIOS™ Setup utility for the H8DSP-8/H8DSP-i. The AMI ROM BIOS is stored in a fl ash chip and can be easily upgraded using a fl oppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.
H8DSP-8/H8DSP-i User's Manual Main Menu When you fi rst enter AMI BIOS Setup Utility, you will see the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen.
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Chapter 4: BIOS IDE Confi guration Onboard PCI IDE Controller The following options are available to set the IDE controller status: Disabled will disable the controller. Primary will enable the primary IDE controller. There is no Secondary option since only one IDE slot is provided on the board. Primary IDE Master/Slave Highlight one of the two items above and press <Enter>...
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H8DSP-8/H8DSP-i User's Manual data transfer rate of 3.3 MBs. Select 1 to allow AMI BIOS to use PIO mode 1 for a data transfer rate of 5.2 MBs. Select 2 to allow AMI BIOS to use PIO mode 2 for a data transfer rate of 8.3 MBs. Select 3 to allow AMI BIOS to use PIO mode 3 for a data transfer rate of 11.1 MBs.
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Chapter 4: BIOS Floppy Confi guration Floppy A Move the cursor to these fi elds via up and down <arrow> keys to select the fl oppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½".
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H8DSP-8/H8DSP-i User's Manual KBC Clock Source The options for the KBC clock source are 8 MHz, 12 MHz and 16 MHz. Restore on AC Power Loss This setting allows you to choose how the system will react when power returns after an unexpected loss of power.
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Chapter 4: BIOS ACPI APIC Support Select "Enabled" to allow the ACPI APIC Table Pointer to be included in the RSDT pointer list. The options are Enabled and Disabled. ACPI OEMB Table This setting when enabled will include an OEMB table pointer to pointer lists. Options are Enabled and Disabled.
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H8DSP-8/H8DSP-i User's Manual CPU0: CPU1 HT Link Width The HT link will run at the width specifi ed in this setting. Options are Auto, 2 bit, 4 bit, 8 bit and 16 bit. CPU0: HT2000 HT Link Speed The HT link will run at the speed specifi ed in this setting if it is slower than or equal to the system clock and if the board is capable.
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Chapter 4: BIOS Remote Access Confi guration Remote Access Use this setting to Enable or Disable remote access. If Enabled is selected, you can select a Remote Access type. USB Confi guration This screen will display the module version and all USB enabled devices. Legacy USB Support Select "Enabled"...
H8DSP-8/H8DSP-i User's Manual System Fan Monitor Fan Speed Control Modes This feature allows the user to determine how the system will control the speed of the onboard fans. If the option is set to "3-pin fan", the fan speed is controlled based upon the CPU die temperature. When the CPU die tem- perature is higher, the fan speed will be higher as well.
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Chapter 4: BIOS Palette Snooping Select "Enabled" to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly. The options are Enabled and Disabled. PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering.
H8DSP-8/H8DSP-i User's Manual Boot Menu Boot Settings Confi guration Quick Boot If Enabled, this option will skip certain tests during POST to reduce the time needed for the system to boot up. The options are Enabled and Disabled. Quiet Boot If Disabled, normal POST messages will be displayed on boot-up.
Chapter 4: BIOS Boot Device Priority This feature allows the user to prioritize the sequence for the Boot Device with the devices installed in the system. The default settings (with generic names) are: · 1st Boot Device – Removeable drive (e.g. fl oppy drive) ·...
H8DSP-8/H8DSP-i User's Manual Security Menu AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set fi rst. Change Supervisor Password Select this option and press <Enter> to access the sub menu, and then type in the password.
Chapter 4: BIOS Chipset Menu North Bridge Confi guration Memory Confi guration Memclock Mode This setting determines how the memory clock is set. Auto has the memory clock set by the code and Limit allows the user to set a standard value. MCT Timing Mode Sets the timing mode for memory.
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H8DSP-8/H8DSP-i User's Manual ECC Confi guration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automati- cally. Options are Enabled and Disabled. MCA DRAM ECC Logging When "Enabled", MCA DRAM ECC logging and reporting is enabled.
Chapter 4: BIOS HT2000 System I/O Confi guration EXB_B Split to 2 (x4) Enable or Disable EXB_B Split to 2. EXB_C Split to 2 (x4) Enable or Disable EXB_C Split to 2. HT1000 SouthBridge Confi guration HIDE XIOAPIC PCI Functions The options are Yes and No.
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H8DSP-8/H8DSP-i User's Manual Load Optimal Defaults To set this feature, select Load Optimal Defaults from the Exit menu and press <Enter>. Then Select "OK" to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications.
Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint...
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H8DSP-8/H8DSP-i User's Manual Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description The onboard fl oppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next.
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Appendix B: BIOS POST Checkpoint Codes Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM. Checkpoint Code Description The NMI is disabled. Next, checking for a soft reset or a power on condition. The BIOS stack has been built.
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H8DSP-8/H8DSP-i User's Manual Checkpoint Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Confi guring the mono- chrome mode and color mode settings next.
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Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset. Saving the memory size next.
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H8DSP-8/H8DSP-i User's Manual Checkpoint Code Description The password was checked. Performing any required programming before WIN- BIOS Setup next. The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next.
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Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Initialization after E000 option ROM control has completed. Displaying the system confi guration next. Uncompressing the DMI data and executing DMI POST initialization next.
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