Supermicro H8DC8 User Manual

Serverboard

Hide thumbs

Table Of Contents

Table of Contents

Quick Links

Download this manual

H8DC8

H8DCi

USER'S MANUAL

Revision 1.0a

Table of Contents

Summary of Contents for Supermicro H8DC8

Page 1 H8DC8 H8DCi USER’S MANUAL Revision 1.0a...
Page 2 The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.
Page 3: About This Manual
This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8DC8/H8DCi serverboard. The H8DC8/H8DCi is based on the nVidia® nForce Pro 2200/2050 chipset and supports single or dual AMD Opteron 200 series type processors in 940-pin microPGA ZIF sockets and up to 32 GB of DDR333 or DDR266 or up to 16 GB of DDR400 registered ECC SDRAM.
Page 4: Table Of Contents
Chapter 1: Introduction Overview ......................1-1 Checklist ....................1-1 H8DC8/H8DCi Image ................1-3 H8DC8/H8DCi Serverboard Layout ............1-4 H8DC8/H8DCi Quick Reference ............... 1-5 Serverboard Features ................1-6 nVidia nForce Pro 2200/2050 Chipset: System Block Diagram ....1-8 Chipset Overview ................... 1-9 PC Health Monitoring ...................
Page 5 Table of Contents Extra USB Headers ................. 2-11 Serial Ports ....................2-11 Fan Headers ..................2-11 JLAN1/2 (Ethernet Ports) ................ 2-11 Power LED/Speaker ................2-12 ATX PS/2 Keyboard/Mouse Ports ............2-12 Chassis Intrusion ..................2-12 Overheat LED ..................2-12 Wake-On-LAN ..................2-13 Wake-On-Ring ..................
Page 6 H8DC8/H8DCi User’s Manual Parallel Port Connector ................2-23 SATA Connectors ..................2-23 SCSI Connectors ................... 2-24 Chapter 3: Troubleshooting Troubleshooting Procedures ................3-1 Before Power On ..................3-1 No Power ....................3-1 No Video ....................3-1 Memory Errors ................... 3-2 Losing the System’s Setup Conﬁ...
Page 7: Chapter 1: Introduction
One (1) ﬂ oppy cable (CBL-022) One (1) USB 2.0 port cable (CBL-083) Two (2) SATA cables (CBL-044) One (1) SCSI cable, H8DC8 only (CBL-034-U320) Two (2) CPU backplates (BKT-0004) Two (2) heatsink retention modules with four (4) screws (BKT-0005)
Page 8 H8DC8/H8DCi User’s Manual Notes...
Page 9: H8Dc8/H8Dci Image
Chapter 1: Introduction Figure 1-1. H8DC8/H8DCi Image Note: H8DC8 is pictured. The H8DCi shares the same layout but with no SCSI compo- nents, connectors or jumpers.
Page 10: H8Dc8/H8Dci Serverboard Layout
Notes: 1. Jumpers not indicated are for test purposes only. 2. The H8DCi has the same layout as the H8DC8 but with no SCSI components, con- nectors or jumpers. 3. For nForce 2050 (IO4) to function properly, you will need to install CPU2; otherwise, the PCI-Express Slot#4, Slot#7 and onboard LAN2 will not work properly.
Page 11: H8Dc8/H8Dci Quick Reference
Chapter 1: Introduction H8DC8/H8DCi Quick Reference Jumpers Description Default Setting USB Standby Power En/Dis Pins 1-2 (Disabled) Audio Output Pins 5-6, 9-10 Closed 3rd Power Fail Detect En/Dis Closed (Enabled) JBT1 CMOS Clear See Section 2-7 C1/2 C to PCI Enable/Disable...
Page 12: Serverboard Features
H8DC8/H8DCi User’s Manual Serverboard Features • Single or dual AMD Opteron 200 series 64-bit processors in 940-pin microPGA ZIF sockets Memory • Eight dual/single channel DIMM slots supporting up to 32 GB of registered ECC DDR333/266 or up to 16 GB of registered ECC DDR400 SDRAM Note: Memory capacities are halved for single CPU systems.
Page 13 Other • Wake-on-Ring (JWOR) • Wake-on-LAN (JWOL) • AC97 Audio CODEC • Onboard +3.3V standby power LED (DP1) • SCSI channel activity LEDs (H8DC8 only) • Chassis intrusion detection CD Utilities • BIOS ﬂ ash upgrade utility Dimensions • Extended ATX form factor, 12" x 13.05" (305 x 332 mm)
Page 14: Nvidia Nforce Pro 2200/2050 Chipset: System Block Diagram
H8DC8/H8DCi User’s Manual DDR400/333/266 DIMM A1 DIMM A2 DIMM A3 16 x 16 HT link (1 GHz) 128-bit data + 16-bit ECC 128-bit data + 16-bit ECC DIMM A4 DDR400/333/266 DIMM B1 SCSI Ports (2) AIC 7902W AMD Opteron AMD Opteron...
Page 15: Chipset Overview
Chapter 1: Introduction Chipset Overview The H8DC8/H8DCi serverboard is based on the nVidia nForce Pro 2200/2050 and AMD 8132 chipset. The nVidia nForce Pro 2200/2050 functions as Media and Com- munications Processors (MCPs) and the AMD 8132 as a PCI-X Tunnel. Controllers for the system memory are integrated directly into the AMD Opteron processors.
Page 16: Pc Health Monitoring
H8DC8/H8DCi User’s Manual PC Health Monitoring This section describes the PC health monitoring features of the H8DC8/H8DCi. The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for two CPU cores, Hyper Transport (1.2V), two memory banks (2.5V), nVidia 2200/2050 chipset (1.5V)
Page 17: Power Conﬁ Guration Settings
Chapter 1: Introduction Power Conﬁ guration Settings This section describes the features of your serverboard that deal with power and power settings. Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests.
Page 18: Power Supply
It is even more important for processors that have high CPU clock rates of 1 GHz and faster. The H8DC8/H8DCi accommodates 12V ATX power supplies. Although most power supplies generally meet the speciﬁ cations required by the CPU, some are inad- equate.
Page 19: Super I/O
Chapter 1: Introduction Super I/O The disk drive adapter functions of the Super I/O chip include a ﬂ oppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock genera- tor, drive interface control logic and interrupt and DMA logic.
Page 20 H8DC8/H8DCi User’s Manual Notes 1-14...
Page 21: Chapter 2: Installation
Chapter 2: Installation Chapter 2 Installation Static-Sensitive Devices Electric Static Discharge (ESD) can damage electronic com ponents. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally sufﬁ cient to protect your equipment from ESD. Precautions •...
Page 22: Processor And Heatsink Installation
H8DC8/H8DCi User's Manual Processor and Heatsink Installation Exercise extreme caution when handling and installing the proces- sor. Always connect the power cord last and always remove it be- fore adding, removing or changing any hardware components. Installing the CPU Backplates Two CPU backplates (BKT-0004) are included in the retail box.
Page 23 Chapter 2: Installation 4. With the CPU inserted into the socket, inspect the four corners of the CPU to make sure that it is properly installed and ﬂ ush with the socket. 5. Gently press the CPU socket lever down until it locks in the plastic tab. For a dual-processor system, repeat these steps to install another CPU into the CPU#2 socket.
Page 24: Mounting The Serverboard Into A Chassis
1. Check the compatibility of the serverboard ports and the I/O shield The H8DC8/H8DCi serverboard requires a chassis that can support extended ATX boards of 12" x 13.05" in size. Make sure that the I/O ports on the serverboard align with their respective holes in the I/O shield at the rear of the chassis.
Page 25 Chapter 2: Installation Support The H8DC8/H8DCi supports single or dual-channel, registered ECC DDR400/333/266 SDRAM. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots (see note on previous page and charts on following page). The CPU2 DIMM slots can only be accessed when two CPUs are installed (however, the CPU2 DIMM slots are not required to be populated when two CPUs are installed).
Page 26 H8DC8/H8DCi User's Manual Populating Memory Banks for 128-bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B Notes: X indicates a populated DIMM slot. If adding at least four DIMMs (with two CPUs installed), the conﬁ...
Page 27: I/O Port And Control Panel Connections
Chapter 2: Installation I/O Port and Control Panel Connections The I/O ports are color coded in conformance with the PC99 speciﬁ cation to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3.
Page 28: Connecting Cables
H8DC8/H8DCi User's Manual Connecting Cables ATX Power 24-pin Connector Pin Deﬁ nitions (J1B4) ATX Power Connector Pin# Deﬁ nition Pin # Deﬁ nition +3.3V +3.3V The primary ATX power supply con- -12V +3.3V nector (J1B4) meets the SSI (Super- set ATX) 24-pin speciﬁ cation. Refer to PS_ON the table on the right for the pin deﬁ...
Page 29: Hdd Led
Chapter 2: Installation HDD LED HDD LED The HDD (IDE Hard Disk Drive) LED Pin Deﬁ nitions (JF1) connection is located on pins 13 and Pin# Deﬁ nition 14 of JF1. Attach the IDE hard drive LED cable to display disk activity. HD Active Refer to the table on the right for pin deﬁ...
Page 30: Power Fail Led
H8DC8/H8DCi User's Manual Power Fail LED Power Fail LED The Power Fail LED connection is Pin Deﬁ nitions (JF1) located on pins 5 and 6 of JF1. Refer Pin# Deﬁ nition to the table on the right for pin deﬁ ni- tions.
Page 31: Extra Usb Headers
Figure 2-3 for locations and the table on the right for pin deﬁ nitions. Ground Note: NC indicates no connection. Fan Headers The H8DC8/H8DCi has eight fan headers, which are designated FAN1 Fan Header Pin Deﬁ nitions through FAN8. Fans are Pulse Width...
Page 32: Power Led/Speaker
H8DC8/H8DCi User's Manual Power LED/Speaker PWR LED Connector Pin Deﬁ nitions (JD1) Pin# Deﬁ nition On JD1, pins 1, 2, and 3 are for the +Vcc power LED and pins 4 through 7 are for the speaker. See the tables on the Control right for pin deﬁ...
Page 33: Wake-On-Lan
Chapter 2: Installation Wake-On-LAN Wake-On-LAN Pin Deﬁ nitions The Wake-On-LAN header is desig- (JWOL) nated JWOL. See the table on the Pin# Deﬁ nition right for pin deﬁ nitions. You must +5V Standby have a LAN card with a Wake-On-LAN Ground connector and cable to use the Wake- Wake-up...
Page 34: Cd1 Header
H8DC8/H8DCi User's Manual CD1 Header Pin Deﬁ nitions Pin# Deﬁ nition The 4-pin CD1 header allows you to Right Signal use the onboard sound for audio CD playback. Connect the audio cable Ground from your CD drive to this header.
Page 35: Ac97
Chapter 2: Installation AC97 AC97 provides high quality onboard Line In (blue port): Surround L/R audio. The H8DC8/H8DCi features 6-channel (5.1) sound for front L&R, Line Out (green port): Front L/R rear L&R, center and subwoofer speakers. This feature is activated with software included on the CD- ROM that came with the serverboard.
Page 36: Jumper Settings
H8DC8/H8DCi User's Manual Jumper Settings Explanation of Jumpers To modify the operation of the Connector serverboard, jumpers can be used to Pins choose between optional settings. Jumpers create shorts between two pins to change the function of the Jumper connector. Pin 1 is identiﬁ ed with a square solder pad on the printed circuit board.
Page 37: 3Rd Power Supply Fail Signal Enable/Disable
Chapter 2: Installation 3rd Power Supply Fail Signal Enable/Disable The system can notify you in the event 3rd Power Supply Fail Signal of a power supply failure. This feature Jumper Settings (J3P) assumes that three redundant power Jumper Setting Deﬁ nition supply units are installed in the chas- Open Disabled...
Page 38: Pci-X Slot Speed
PCI-X Slot Speed PCI-X Slot Speed Jumper Settings (JPX1A/JPX1B) Jumpers JPX1B and JPX1A on the Jumper Setting Deﬁ nition H8DC8/H8DCi can be used to change Open Auto the speed of PCI-X slots 2 and 3 and Pins 1-2 PCI-X 66 MHz PCI-X slot 1, respectively.
Page 39: Scsi Termination Enable/Disable
Chapter 2: Installation SCSI Termination Enable/ Disable (H8DC8 only) SCSI Term. Enable/Disable Jumper Settings (JPA2, JPA3) Jumper Setting Deﬁ nition Jumpers JPA2 and JPA3 are used to Open Enabled enable or disable termination for the Closed Disabled SCSI Channel A and B connector, re- spectively.
Page 40: Onboard Indicators
S1, S3 (Suspend to RAM) or S4 (Suspend to Disk) state.See the table on the right for DP1 LED states. SCSI Activity LEDs (H8DC8) SCSI Activity LEDs When illuminated, the DA1 and DA2 (DA1, DA2)
Page 41: Floppy, Ide, Parallel Port, Scsi And Sata Drive Connections
Chapter 2: Installation Floppy, IDE, Parallel Port, SCSI and SATA Drive Connections Use the following information to connect the ﬂ oppy and hard disk drive cables. The ﬂ oppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1. A single ﬂ...
Page 42: Ide Connectors
H8DC8/H8DCi User's Manual IDE Connectors IDE Drive Connectors Pin Deﬁ nitions (JIDE#1/JIDE#2) Pin# Deﬁ nition Pin # Deﬁ nition There are no jumpers to conﬁ g- ure the onboard IDE#1 and #2 Reset IDE Ground connectors. See the table on...
Page 43: Parallel Port Connector
Chapter 2: Installation Parallel Port Parallel Port Connector Pin Deﬁ nitions Connector Pin# Deﬁ nition Pin # Deﬁ nition See the table on the right for Strobe- Auto Feed- pin deﬁ nitions of the parallel Data Bit 0 Error- (printer) port. Data Bit 1 Init- Data Bit 2...
Page 44: Scsi Connectors
H8DC8/H8DCi User's Manual SCSI Connectors Ultra320 SCSI Connectors Pin Deﬁ nitions (JA1/JB2) (H8DC8 only) Pin# Deﬁ nition Pin # Deﬁ nition Refer to the table at right for +DB (12) -DB (12) pin deﬁ nitions for the Ultra320 +DB (13)
Page 45: Chapter 3: Troubleshooting
Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components.
Page 46: Memory Errors
H8DC8/H8DCi User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed.
Page 47: Frequently Asked Questions
Frequently Asked Questions Question: What type of memory does my serverboard support? Answer: The H8DC8/H8DCi supports up to 32 GB of registered ECC DDR333/266 or up to 16 GB of registered ECC DDR400 interleaved or non-interleaved SDRAM with two CPUs installed. With only one CPU installed the maximum memory sup- port is halved.
Page 48: Returning Merchandise For Service
H8DC8/H8DCi User's Manual Question: Why can't I turn off the power using the momentary power on/off switch? Answer: The instant power off function is controlled in BIOS by the Power But- ton Mode setting. When the On/Off feature is enabled, the serverboard will have instant off capabilities as long as the BIOS has control of the system.
Page 49: Chapter 4: Bios
Chapter 4 BIOS Introduction This chapter describes the AMIBIOS™ Setup utility for the H8DC8/H8DCi. The AMI ROM BIOS is stored in a ﬂ ash chip and can be easily upgraded using a ﬂ oppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.
Page 50: Main Menu
H8DC8/H8DCi User's Manual Main Menu When you ﬁ rst enter AMI BIOS Setup Utility, you will see the Main Menu screen. You can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys.
Page 51 Chapter 4: BIOS Primary/Secondary/Third/Fouth/Fifth/Sixth IDE Master/Slave Highlight one of the items above and press <Enter> to access the submenu for that item. Type Select the type of device connected to the system. The options are Not Installed, Auto, CDROM and ARMD. LBA/Large Mode LBA (Logical Block Addressing) is a method of addressing data on a disk drive.
Page 52 H8DC8/H8DCi User's Manual DMA Mode Selects the DAM Mode. Options are SWDMA0, SWDMA1, SWDMA2, MWDMA0. MDWDMA1, MWDMA2, UDMA0. UDMA1, UDMA2, UDMA3, UDMA4 and UDMA5. (SWDMA=Single Word DMA, MWDMA=Multi Word DMA, UDMA=UltraDMA.) S.M.A.R.T. Self-Monitoring Analysis and Reporting Technology (SMART) can help predict impending drive failures.
Page 53 Chapter 4: BIOS Conﬁ guration nVidia RAID ROM RAID Option ROM This setting is used to Enable or Disable the nVidia ROM. If Enabled, the setting below will appear. Master SATA as RAID This setting is used to Enable or Disable the 3rd Master as RAID. Floppy Conﬁ...
Page 54 H8DC8/H8DCi User's Manual Allocate IRQ to PCI VGA Set this value to allow or restrict the system from giving the VGA adapter card an interrupt address. The options are Yes and No. Palette Snooping Select "Enabled" to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly.
Page 55 Chapter 4: BIOS Super IO Conﬁ guration Serial Port1 Address This option speciﬁ es the base I/O port address and Interrupt Request address of serial port 1. Select "Disabled" to prevent the serial port from accessing any system resources. When this option is set to Disabled, the serial port physically becomes unavailable.
Page 56: Advanced Chipset Control
H8DC8/H8DCi User's Manual Advanced Chipset Control North Bridge Conﬁ guration Memory Conﬁ guration Memclock Mode This setting determines how the memory clock is set. Auto has the memory clock by code and Limit allows the user to set a standard value.
Page 57 Chapter 4: BIOS ECC Conﬁ guration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automati- cally. Options are Enabled and Disabled. MCA DRAM ECC Logging When Enabled, MCA DRAM ECC logging and reporting is enabled. Options are Enabled and Disabled.
Page 58 H8DC8/H8DCi User's Manual Memory Timing Parameters Allows the user to select which CPU Node's timing parameters (memory clock, etc.) to display. Options are CPU Node 0 and CPU Node1. South Bridge Conﬁ guration Audio CODEC Interface Use this setting to Enable or Disable the internal ACI.
Page 59 Chapter 4: BIOS APCI Conﬁ guration General APCI Conﬁ guration Suspend Mode Select the mode used for the system suspend state. Options are S1 (POS), S3 (STR) and Auto. (POS=Power Off Standby, STR=Suspend to RAM.) Advanced ACPI Conﬁ guration ACPI 2.0 Features "Yes"...
Page 60: Power Menu
H8DC8/H8DCi User's Manual Power Menu Power Button Mode Allows the user to change the function of the power button. Options are On/Off and Suspend. Restore on AC Power Loss This setting allows you to choose how the system will react when power returns after an unexpected loss of power.
Page 61 Chapter 4: BIOS MPS Conﬁ guration MPS Revision This setting allows the user to select the MPS revision level. The options are 1.1 and 1.4. PCI Express Conﬁ guration Active State Power Management Use this setting to Enable or Disable PCI Express L0s and L1 link power states.
Page 62 H8DC8/H8DCi User's Manual Redirection After BIOS POST Options are Disable (no redirection after BIOS POST), Boot Loader (redirection during POST and during boot loader) and Always (redirection always active). Note that some OS's may not work with this set to Always.
Page 63 Chapter 4: BIOS System Health Monitor CPU Overheat Temperature Use the "+" and "-" keys to set the CPU temperature threshold to between 65 and 90 C. When this threshold is exceeded, the overheat LED on the chas- sis will light up and an alarm will sound. The LED and alarm will turn off once the CPU temperature has dropped to 5 degrees below the threshold set.
Page 64: Boot Menu
H8DC8/H8DCi User's Manual Boot Menu This feature allows the user to conﬁ gure the following items: Boot Settings Conﬁ guration Quick Boot If Enabled, this option will skip certain tests during POST to reduce the time needed for the system to boot up. The options are Enabled and Disabled.
Page 65: Boot Device Priority
Chapter 4: BIOS Interrupt 19 Capture Enable to allow ROMs to trap Interrupt 19. The options are Enabled and Dis- abled. Boot Device Priority This feature allows the user to prioritize the sequence for the Boot Device. The devices to set are: ·...
Page 66: Security Menu
H8DC8/H8DCi User's Manual Security Menu AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set ﬁ rst. Change Supervisor Password Select this option and press <Enter> to access the sub menu, and then type in the password.
Page 67: Exit Menu
Chapter 4: BIOS Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen. Save Changes and Exit When you have completed the system conﬁ guration changes, select this option to leave BIOS Setup and reboot the computer, so the new system conﬁ guration parameters can take effect.
Page 68 H8DC8/H8DCi User's Manual Notes 4-20...
Page 69: Appendix A: Bios Error Beep Codes
Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
Page 70 H8DC8/H8DCi User’s Manual Notes...
Page 71: Appendix B: Bios Post Checkpoint Codes
Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint...
Page 72 H8DC8/H8DCi User’s Manual Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description The onboard ﬂ oppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next.
Page 73 Appendix B: BIOS POST Checkpoint Codes Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM. Checkpoint Code Description The NMI is disabled. Next, checking for a soft reset or a power on condition. The BIOS stack has been built.
Page 74 H8DC8/H8DCi User’s Manual Checkpoint Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Conﬁ guring the mono- chrome mode and color mode settings next.
Page 75 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset. Saving the memory size next.
Page 76 H8DC8/H8DCi User’s Manual Checkpoint Code Description The password was checked. Performing any required programming before WIN- BIOS Setup next. The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next.
Page 77 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Initialization after E000 option ROM control has completed. Displaying the system conﬁ guration next. Uncompressing the DMI data and executing DMI POST initialization next.
Page 78 H8DC8/H8DCi User’s Manual Notes...

This manual is also suitable for:

H8dci

Supermicro H8DC8 User Manual

Chapter 1: Introduction

Chapter 2: Installation

Chapter 3: Troubleshooting

Chapter 4: BIOS

Appendix A: BIOS Error Beep Codes

Appendix B: BIOS POST Checkpoint Codes

Quick Links

Related Manuals for Supermicro H8DC8

Summary of Contents for Supermicro H8DC8

This manual is also suitable for:

Table of Contents