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Supero H8QC8 User Manual

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USER'S MANUAL
Revision 1.0c

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Summary of Contents for Supero H8QC8

  • Page 1 H8QC8 H8QC8+ H8QCE H8QCE+ USER’S MANUAL Revision 1.0c...
  • Page 2 The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates.

  • Page 3: Manual Organization

    This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8QC8/H8QC8+/H8QCE/H8QCE+ serverboard. The H8QC8(+)/H8QCE(+) is based on the nVidia® nForce Pro 2200 (CK804) and the AMD 8132 chipset and...

  • Page 4: Table Of Contents

    Chapter 1: Introduction Overview ......................1-1 Checklist ....................1-1 H8QC8/H8QCE Image ................1-3 H8QC8+/H8QCE+ Image ................. 1-3 H8QC8/H8QCE Serverboard Layout ............1-4 H8QC8/H8QCE Quick Reference ............1-5 H8QC8+/H8QCE+ Serverboard Layout ........... 1-6 H8QC8+/H8QCE+ Quick Reference ............1-7 Serverboard Features ................1-8 nVidia nForce Pro 2200/AMD 8132 Chipset: System Block Diagram ...
  • Page 5 Table of Contents Reset Button .................... 2-9 Power Button .................... 2-9 Universal Serial Bus Ports (USB0/1) ............2-9 Extra USB Headers ................2-10 Serial Ports ..................... 2-10 Fan Headers ..................2-10 JLAN1/2 (Ethernet Ports) ............... 2-10 Power LED/Keylock/Speaker ..............2-11 ATX PS/2 Keyboard/Mouse Ports ............
  • Page 6 H8QC8(+)/H8QCE(+) User’s Manual 2-10 Enabling SATA RAID ..................2-23 Chapter 3: Troubleshooting Troubleshooting Procedures ................3-1 Before Power On ..................3-1 No Power ....................3-1 No Video ....................3-1 Memory Errors ..................3-2 Losing the System’s Setup Confi guration ..........3-2 Technical Support Procedures ...............

  • Page 7: Chapter 1: Introduction

    Four (4) heatsink retention modules with eight (8) screws (BKT-0005) One (1) COM port cable (CBL-010, H8QC8/H8QCE only) One (1) I/O shield for chassis (CSE-PT7, H8QC8/H8QCE only) One (1) air shroud with two (2) fans (CSE-PT0115, FAN-0089, H8QC8+/ H8QCE+ only) One (1) CD containing drivers and utilities...

  • Page 8: H8Qc8/H8Qce Image

    H8QC8(+)/H8QCE(+) User’s Manual Figure 1-1. H8QC8/H8QCE Image Note: The H8QC8 is shown. The H8QCE shares the same layout but does not include SCSI controllers, connectors, or jumpers.

  • Page 9: H8Qc8+/H8Qce+ Image

    Chapter 1: Introduction Figure 1-2. H8QC8+/H8QCE+ Image Note: The H8QC8+ is shown. The H8QCE+ shares the same layout but does not include SCSI controllers, connectors, or jumpers.

  • Page 10: H8Qc8/H8Qce Serverboard Layout

    H8QC8(+)/H8QCE(+) User’s Manual Figure 1-3. H8QC8/H8QCE Serverboard Layout (not drawn to scale) HT Connector JOH1 DIMMB-1B DIMMB-1A DIMMB-2B DIMMB-2A CPU3 FAN1 FAN2 FAN7/CPU3 CPU4 DIMMC-2A DIMMC-2B DIMMC-1A FAN3/CPU2 USB0/1 DIMMC-1B COM1 Speaker DIMMD-1B DIMMD-1A FAN4/CPU1 DIMMD-2B CPU1 DIMMD-2A FAN5 JLAN1...

  • Page 11: H8Qc8/H8Qce Quick Reference

    System Management Bus Header JWF1/2 Compact Flash Power Headers JWOL/JWOR Wake-On-LAN/Wake-On-Ring Headers nFAN1/4 Additional Fan Headers (nFAN1/2 for chipset heatsinks) SATA0-3 Serial ATA Ports Speaker Onboard Speaker (Buzzer) USB0/1 Universal Serial Bus (USB) Ports 0/1 USB2/3 USB2/3 Headers *Included on the H8QC8 only.

  • Page 12: H8Qc8+/H8Qce+ Serverboard Layout

    H8QC8(+)/H8QCE(+) User’s Manual Figure 1-4. H8QC8+/H8QCE+ Serverboard Layout (not drawn to scale) JOH1 DIMMB-1B DIMMB-1A DIMMB-2B DIMMB-2A CPU3 FAN1 FAN2 FAN7/CPU3 CPU4 DIMMC-2A DIMMC-2B DIMMC-1A FAN3/CPU2 USB0/1 DIMMC-1B COM1 Speaker DIMMD-1B DIMMD-1A FAN4/CPU1 DIMMD-2B CPU1 DIMMD-2A FAN5 JLAN1 DIMMA-2A CPU2...

  • Page 13: H8Qc8+/H8Qce+ Quick Reference

    Compact Flash Power Headers JWOL Wake-On-LAN Header JWOR Wake-On-Ring Header nFAN1/4 Additional Fan Headers (nFAN3/4 used with air shroud) SATA0-3 Serial ATA Ports Speaker Onboard Speaker (Buzzer) USB0/1 Universal Serial Bus (USB) Ports 0/1 USB2/3 USB2/3 Headers *Included on the H8QC8+ only.

  • Page 14: Serverboard Features

    H8QC8(+)/H8QCE(+) User’s Manual Serverboard Features • Four AMD Opteron 800 series 64-bit processors in 940-pin microPGA ZIF sockets (the use of less than four CPUs is not recommended) Memory • Sixteen dual/single channel DIMM slots (four per CPU) supporting up to 64 GB...
  • Page 15 • Two (2) UltraDMA133/100 IDE ports • One (1) fl oppy port interface (up to 2.88 MB) • Two (2) Fast UART 16550 compatible serial ports (one only on H8QC8+ and H8QCE+) • Intel 82546GB Ethernet controller supports two Gigabit LAN ports •...

  • Page 16: Nvidia Nforce Pro 2200/Amd 8132 Chipset: System Block Diagram

    H8QC8(+)/H8QCE(+) User’s Manual DDR400/333/266 DDR400/333/266 DIMM 2B DIMM 2B DIMM 2A DIMM 2A DIMM 1B AMD Opteron AMD Opteron DIMM 1B DIMM 1A DIMM 1A CPU #3 CPU #2 16 x 16 HT link 16 x 16 HT link 128-bit data + 16-bit ECC...

  • Page 17: Chipset Overview

    Each bridge supports up to fi ve PCI mas- ters that include clock, request and grant signals. It also interfaces directly with the Ethernet controllers. On the H8QC8(+), the SCSI channels are linked directly to the 8132.

  • Page 18: Pc Health Monitoring

    H8QC8(+)/H8QCE(+) User’s Manual PC Health Monitoring This section describes the PC health monitoring features of the H8QC8(+)/ H8QCE(+). The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for CPU cores, Hyper Transport (1.2V), two memory banks (2.5V), nVidia 2200 chipset (1.5V)

  • Page 19: Power Confi Guration Settings

    Chapter 1: Introduction Power Confi guration Settings This section describes the features of your serverboard that deal with power and power settings. Microsoft OnNow The OnNow design initiative is a comprehensive, system-wide approach to system and device power control. OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests.

  • Page 20: Power Supply

    It is even more important for processors that have high CPU clock rates of 1 GHz and faster. The H8QC8(+)/H8QCE(+) accommodates 12V ATX power supplies. Although most power supplies generally meet the specifi cations required by the CPU, some are inadequate.

  • Page 21: Super I/O

    Chapter 1: Introduction Super I/O The disk drive adapter functions of the Super I/O chip include a fl oppy disk drive controller that is compatible with industry standard 82077/765, a data separator, write pre-compensation circuitry, decode logic, data rate selection, a clock genera- tor, drive interface control logic and interrupt and DMA logic.

  • Page 22: Contacting Supermicro

    H8QC8(+)/H8QCE(+) User’s Manual Contacting Supermicro Headquarters Address: SuperMicro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Web Site: www.supermicro.com Europe Address: SuperMicro Computer B.V.

  • Page 23: Chapter 2: Installation

    Chapter 2: Installation Chapter 2 Installation Static-Sensitive Devices Electric Static Discharge (ESD) can damage electronic com ponents. To prevent damage to your system board, it is important to handle it very carefully. The following measures are generally suffi cient to protect your equipment from ESD. Precautions •...

  • Page 24: Processor And Heatsink Installation

    H8QC8(+)/H8QCE(+) User's Manual Processor and Heatsink Installation Exercise extreme caution when handling and installing the proces- sor. Always connect the power cord last and always remove it be- fore adding, removing or changing any hardware components. Installing the CPU Backplates Four CPU backplates (BKT-0004) are included in the retail box.
  • Page 25 Chapter 2: Installation 4. With the CPU inserted into the socket, inspect the four corners of the CPU to make sure that it is properly installed and fl ush with the socket. 5. Gently press the CPU socket lever down until it locks in the plastic tab. Repeat these steps to install CPUs into the other three CPU sockets.

  • Page 26: Mounting The Serverboard Into A Chassis

    1. Check the compatibility of the serverboard ports and the I/O shield The H8QC8(+)/H8QCE(+) serverboard requires a chassis that can support extended ATX boards of 16" x 13" in size. Make sure that the I/O ports on the serverboard align with their respective holes in the I/O shield at the rear of the chassis.
  • Page 27 Chapter 2: Installation Support The H8QC8(+)/H8QCE(+) supports single or dual-channel, registered ECC DDR400/333/266 SDRAM. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots (see note on previous page). Populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved (128-bit) memory, which is faster than non-interleaved (64-bit) memory.

  • Page 28: I/O Port And Control Panel Connections

    H8QC8(+)/H8QCE(+) User's Manual I/O Port and Control Panel Connections The I/O ports are color coded in conformance with the PC99 specifi cation to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports.

  • Page 29: Connecting Cables

    Chapter 2: Installation Connecting Cables ATX Power 24-pin Connector Pin Defi nitions (J1B1) ATX Power Connector Pin# Defi nition Pin # Defi nition +3.3V +3.3V The primary ATX power supply con- -12V +3.3V nector (J1B1) meets the SSI (Super- set ATX) 24-pin specifi cation. Refer to PS_ON the table on the right for the pin defi...

  • Page 30: Hdd Led

    H8QC8(+)/H8QCE(+) User's Manual HDD LED HDD LED The HDD (IDE Hard Disk Drive) LED Pin Defi nitions (JF1) connection is located on pins 13 and Pin# Defi nition 14 of JF1. Attach the IDE hard drive LED cable to display disk activity.

  • Page 31: Power Fail Led

    Chapter 2: Installation Power Fail LED Power Fail LED The Power Fail LED connection is Pin Defi nitions (JF1) located on pins 5 and 6 of JF1. Refer Pin# Defi nition to the table on the right for pin defi ni- tions.

  • Page 32: Extra Usb Headers

    Pin # Defi nition The COM1 serial port is located un- der the parallel port and the COM2 header (on the H8QC8/H8QCE only) is located between PCI slots #2 and #3. Refer to the table on the right for Ground pin defi...

  • Page 33: Power Led/Keylock/Speaker

    Chapter 2: Installation Speaker Connector Pin Defi nitions (JF2) Power LED/Keylock/Speaker Pin# Defi nition On the JF2 header, pins 2, 4 and 6 Red wire, speaker data are for the power LED, pins 8 and 10 are for the keylock and pins 1, 3, 5 Buzzer signal and 7 are for the speaker (there is no Speaker data...

  • Page 34: Wake-On-Lan

    H8QC8(+)/H8QCE(+) User's Manual Wake-On-LAN Wake-On-LAN Pin Defi nitions The Wake-On-LAN header is desig- (JWOL) nated JWOL. See the table on the Pin# Defi nition right for pin defi nitions. You must +5V Standby have a LAN card with a Wake-On-LAN...

  • Page 35: I 2 C Header For Power Supply

    Pin Defi nitions nated nFAN1 through nFAN4, are (nFAN1-4) included on the serverboard. On the Pin# Defi nition H8QC8/H8QCE, nFAN1 and nFAN2 should be connected to the heatsinks Ground on the CK804 and 8132 (chipset) chips. On the H8QC8+/H8QCE+, nFAN3 and nFAN4 should be con- nected to the heatsinks that are used with the air shroud.

  • Page 36: Jumper Settings

    H8QC8(+)/H8QCE(+) User's Manual Jumper Settings Explanation of Jumpers To modify the operation of the Connector serverboard, jumpers can be used to Pins choose between optional settings. Jumpers create shorts between two pins to change the function of the Jumper connector. Pin 1 is identifi ed with a square solder pad on the printed circuit board.

  • Page 37: I 2 C To Pci-X Slots #1, 2 Enable/Disable

    Chapter 2: Installation C to PCI-X Slots #1,2 Enable/Disable (H8QC8/ H8QCE only) C to PCI# 1,2 Enable/Disable The JI C1/2 pair of jumpers allows Jumper Settings you to connect the System Manage- C1/2) ment Bus to PCI-X slots #1 and 2. The Jumper Setting Defi...

  • Page 38: Scsi Termination Enable/Disable

    H8QC8(+)/H8QCE(+) User's Manual SCSI Termination Enable/ Disable (H8QC8/H8QC8+ SCSI Term. Enable/Disable Jumper Settings (JPA2/JPA3) only) Jumper Setting Defi nition Open Enabled Jumpers JPA2 and JPA3 are used to Closed Disabled enable or disable termination for SCSI channels A and B, respectively. The default setting is open to enable termi- nation.

  • Page 39: Watch Dog Enable/Disable

    Enabled table on the right for jumper settings. Pins 2-3 Disabled The default setting is enabled. PCI-X Slot Frequency Select (H8QC8/H8QCE only) PCI-X Slot #1/#2 Frequency Select Jumper Settings Jumper JPXA1 is are used to set (JPXA1) the speed of PCI-X slots #1 and #2, Jumper Setting Defi...

  • Page 40: Pci-X Slot Frequency Select (#3/4)

    H8QC8(+)/H8QCE(+) User's Manual PCI-X Slot Frequency Select (H8QC8/H8QCE only) PCI-X Slot #3/#4 Frequency Select Jumper Settings Jumper JPXB1 is are used to set (JPXB1) the speed of PCI-X slots #3 and #4, Jumper Setting Defi nition respectively. The recommended (de-...

  • Page 41: Floppy, Ide, Parallel Port, Scsi And Sata Drive Connections

    Chapter 2: Installation Floppy, IDE, Parallel Port, SCSI and SATA Drive Connections Use the following information to connect the fl oppy and hard disk drive cables. The fl oppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1. A single fl...

  • Page 42: Ide Connectors

    H8QC8(+)/H8QCE(+) User's Manual IDE Connectors IDE Drive Connectors Pin Defi nitions (IDE#1/IDE#2) Pin# Defi nition Pin # Defi nition There are no jumpers to confi g- ure the onboard IDE#1 and #2 Reset IDE Ground connectors. See the table on...

  • Page 43: Parallel Port Connector

    Chapter 2: Installation Parallel Port Parallel Port Connector Pin Defi nitions Connector Pin# Defi nition Pin # Defi nition The parallel (printer) port is Strobe- Auto Feed- located on the I/O backplane. Data Bit 0 Error- See the table on the right for Data Bit 1 Init- pin defi...

  • Page 44: Scsi Connectors

    H8QC8(+)/H8QCE(+) User's Manual SCSI Connectors Ultra320 SCSI Drive Connectors Pin Defi nitions (JA1/JB1) (H8QC8/H8QC8+ only) Pin# Defi nition Pin # Defi nition Refer to the table at right for +DB (12) -DB (12) pin defi nitions for the Ultra320 +DB (13)

  • Page 45: 2-10 Enabling Sata Raid

    Chapter 2: Installation 2-10 Enabling SATA RAID Serial ATA (SATA) Serial ATA (SATA) is a physical storage interface that employs a single cable with a minimum of four wires to create a point-to-point connection between devices. This connection is a serial link that supports a SATA transfer rate from 150 MBps. The serial cables used in SATA are thinner than the traditional cables used in Parallel ATA (PATA) and can extend up to one meter in length, compared to only 40 cm for PATA cables.
  • Page 46 H8QC8(+)/H8QCE(+) User's Manual 2. Use the arrow keys to move to the "Advanced" menu, then scroll down to "IDE Confi guration" and press the <Enter> key. Once in the IDE Confi guration submenu, scroll down to "Confi guration nVidia RAID ROM" and press <Enter> to access that submenu.
  • Page 47 Chapter 2: Installation Figure 2-5. Driver Installation Screen 2-25...
  • Page 48 H8QC8(+)/H8QCE(+) User's Manual Notes 2-26...

  • Page 49: Chapter 3: Troubleshooting

    Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components.

  • Page 50: Memory Errors

    H8QC8(+)/H8QCE(+) User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed.

  • Page 51: Frequently Asked Questions

    Frequently Asked Questions Question: What type of memory does my serverboard support? Answer: The H8QC8(+)/H8QCE(+) supports up to 64 GB of registered ECC DDR333/266 or up to 32 GB of registered ECC DDR400 interleaved or non-in- terleaved SDRAM with all four CPUs installed. See Section 2-4 for details on installing memory.

  • Page 52: Returning Merchandise For Service

    H8QC8(+)/H8QCE(+) User's Manual Question: Why can't I turn off the power using the momentary power on/off switch? Answer: The instant power off function is controlled in BIOS by the Power But- ton Mode setting. When the On/Off feature is enabled, the serverboard will have instant off capabilities as long as the BIOS has control of the system.

  • Page 53: Chapter 4: Bios

    Chapter 4 BIOS Introduction This chapter describes the AMIBIOS™ Setup utility for the H8QC8(+)/H8QCE(+). The AMI ROM BIOS is stored in a fl ash chip and can be easily upgraded using a fl oppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.

  • Page 54: Main Menu

    H8QC8(+)/H8QCE(+) User's Manual Main Menu When you fi rst enter AMI BIOS Setup Utility, you will see the Main Menu screen. You can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys.
  • Page 55 Chapter 4: BIOS Primary/Secondary IDE Master/Slave Highlight one of the items above and press <Enter> to access the submenu for that item. Type Select the type of device connected to the system. The options are Not Installed, Auto, CDROM and ARMD. LBA/Large Mode LBA (Logical Block Addressing) is a method of addressing data on a disk drive.
  • Page 56 H8QC8(+)/H8QCE(+) User's Manual data transfer rate of 3.3 MBs. Select 1 to allow AMI BIOS to use PIO mode 1 for a data transfer rate of 5.2 MBs. Select 2 to allow AMI BIOS to use PIO mode 2 for a data transfer rate of 8.3 MBs. Select 3 to allow AMI BIOS to use PIO mode 3 for a data transfer rate of 11.1 MBs.
  • Page 57 Chapter 4: BIOS ATA(PI) 80Pin Cable Detection This setting allows AMI BIOS to auto-detect the 80-Pin ATA(PI) cable. The options are Host, Device and Host & Device. SATA0 IDE Interface This setting is used to Enable or Disable the serial controller for SATA0. SATA1 IDE Interface This setting is used to Enable or Disable the serial controller for SATA1.
  • Page 58 H8QC8(+)/H8QCE(+) User's Manual PCI/PnP Confi guration Clear NVRAM Select Yes to clear NVRAM during boot-up. The options are Yes and No. Plug & Play OS Select Yes to allow the OS to confi gure Plug & Play devices. (This is not required for system boot if your system has an OS that supports Plug &...
  • Page 59 Chapter 4: BIOS Available and Reserved. DMA Channel0/Channel1/Channel3/Channel5/Channel6/Channel7 Select Available to indicate that a specifi c DMA channel is available to be used by a PCI/PnP device. Select Reserved if the DMA channel specifi ed is reserved for a Legacy ISA device. The options are Available and Reserved. Reserved Memory Size This feature specifi...

  • Page 60: Chipset Menu

    H8QC8(+)/H8QCE(+) User's Manual ports on computer systems use IRQ7 and I/O Port 378H as the standard setting. Select 278 to allow the parallel port to use 278 as its I/O port address. Select 3BC to allow the parallel port to use 3BC as its I/O port address.
  • Page 61 Chapter 4: BIOS Hardware Memory Hole When "Enabled", allows software memory remapping around the memory hole. Options are Enabled and Disabled. Note: this is only supported by Rev E0 processors and above. Node Interleaving Use this setting to Enable or Disable node interleaving. Bank Swizzle Mode The options are Enabled and Disabled.
  • Page 62 H8QC8(+)/H8QCE(+) User's Manual Data Cache BG Scrub Allows L1 cache RAM to be corrected when idle. Options are Disabled and various times in nanoseconds and microseconds. IOMMU Option Menu IOMMU Mode IOMMU is supported on Linux-based systems to convert 32-bit I/O addresses to 64-bit.

  • Page 63: Power Menu

    Chapter 4: BIOS ACPI Confi guration Advanced ACPI Confi guration ACPI 2.0 Features "Yes" enables RSDP pointers to 64-bit fi xed system description pages. Options are Yes and No. ACPI APIC Support Select "Enabled" to allow the ACPI APIC table pointer to be included in the RSDP pointer list.
  • Page 64 H8QC8(+)/H8QCE(+) User's Manual Hyper Transport Confi guration CPU0: CPU1 HT Link Speed The HT link will run at the speed specifi ed in this setting if it is slower than or equal to the system clock and if the board is capable. Options are Auto, 200 MHz, 400 MHz, 600 MHz, 800 MHz and 1 GHz.
  • Page 65 Chapter 4: BIOS PCI Express Confi guration Active State Power Management Use this setting to Enable or Disable PCI Express L0s and L1 link power states. AMD PowerNow Confi guration This setting is used to Enable or Disable the AMD PowerNow feature. SMBIOS Confi...

  • Page 66: System Health Monitor

    H8QC8(+)/H8QCE(+) User's Manual System Health Monitor CPU Overheat Temperature Use the "+" and "-" keys to set the CPU temperature threshold to between 65 and 90 C. When this threshold is exceeded, the overheat LED on the chassis will light up and an alarm will sound. The LED and alarm will turn off once the CPU temperature has dropped to 5 degrees below the threshold set.

  • Page 67: Boot Menu

    Chapter 4: BIOS Boot Menu This feature allows the user to confi gure the following items: Boot Settings Confi guration Quick Boot If Enabled, this option will skip certain tests during POST to reduce the time needed for the system to boot up. The options are Enabled and Disabled. Quiet Boot If Disabled, normal POST messages will be displayed on boot-up.

  • Page 68: Boot Device Priority

    H8QC8(+)/H8QCE(+) User's Manual Boot Device Priority This feature allows the user to prioritize the sequence for the Boot Device. The devices to set are: · 1st Boot Device · 2nd Boot Device · 3rd Boot Device · 4th Boot Device...

  • Page 69: Security Menu

    Chapter 4: BIOS Security Menu AMI BIOS provides a Supervisor and a User password. If you use both passwords, the Supervisor password must be set fi rst. Change Supervisor Password Select this option and press <Enter> to access the sub menu, and then type in the password.
  • Page 70 H8QC8(+)/H8QCE(+) User's Manual Load Optimal Defaults To set this feature, select Load Optimal Defaults from the Exit menu and press <Enter>. Then Select "OK" to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings. The Optimal settings are designed for maximum system performance, but may not work best for all computer applications.

  • Page 71: Appendix A: Bios Error Beep Codes

    Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
  • Page 72 H8QC8(+)/H8QCE(+) User's Manual Notes...

  • Page 73: Appendix B: Bios Post Checkpoint Codes

    Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint...
  • Page 74 H8QC8(+)/H8QCE(+) User's Manual Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description The onboard fl oppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next.
  • Page 75 Appendix B: BIOS POST Checkpoint Codes Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM. Checkpoint Code Description The NMI is disabled. Next, checking for a soft reset or a power on condition. The BIOS stack has been built.
  • Page 76 H8QC8(+)/H8QCE(+) User's Manual Checkpoint Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Confi guring the mono- chrome mode and color mode settings next.
  • Page 77 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset. Saving the memory size next.
  • Page 78 H8QC8(+)/H8QCE(+) User's Manual Checkpoint Code Description The password was checked. Performing any required programming before WIN- BIOS Setup next. The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next.
  • Page 79 Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Initialization after E000 option ROM control has completed. Displaying the system confi guration next. Uncompressing the DMI data and executing DMI POST initialization next.
  • Page 80 H8QC8(+)/H8QCE(+) User's Manual Notes...

This manual is also suitable for:

H8qce+H8qce

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