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Manual Revision 1.1a Release Date: December 4, 2009 Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.
Preface Preface About This Manual This manual is written for system integrators, PC technicians and knowledgeable PC users. It provides information for the installation and use of the H8QM3-2/H8QMi-2 serverboard. The H8QM3-2/H8QMi-2 is based on the nVidia® MCP55 Pro and IO55 chipset and supports two or four AMD Opteron Socket F type 8000 series processors and up to 256 GB of DDR2-800/667/533 registered ECC SDRAM.
Chapter 1: Introduction Chapter 1 Introduction Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry. Our boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance. Please check that the following items have all been included with your serverboard.
H8QM3-2/H8QMi-2 User’s Manual Serverboard Features • Two (dual) or four (quad) AMD Opteron 8000 series Socket F type processors Memory • Thirty-two dual-channel DIMM slots supporting up to 256 GB of registered ECC DDR2-800/667/533 SDRAM Note: Refer to Section 2-4 before installing. Slots fully populated with DDR2-800 or DDR2-667 will run at 533 MHz due to a chipset limitation.
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Chapter 1: Introduction ACPI Features • Slow blinking LED for suspend state indicator • BIOS support for USB keyboard • Main switch override mechanism • Internal/external modem ring-on Onboard I/O • On-chip SATA controller supporting six (6) 3 Gb/s SATA ports (RAID 0, 1, 0+1, 5 and JBOD) •...
Chapter 1: Introduction Chipset Overview The H8QM3-2/H8QMi-2 serverboard is based on the nVidia MCP55 Pro and IO55 chipset. The MCP55 Pro functions as Media and Communications Processor (MCP) and the IO55 as a PCI-E Tunnel. An NEC uPD720404 chip is also included as a bridge for the GB LAN ports and the PCI-X slot.
H8QM3-2/H8QMi-2 User’s Manual PC Health Monitoring This section describes the PC health monitoring features of the H8QM3-2/H8QMi- 2. The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring. Onboard Voltage Monitors for four CPU cores, Hyper Transport (1.2V), memory (1.8V), chipset (1.5V) The onboard voltage monitor will scan these voltages continuously.
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Chapter 1: Introduction Slow Blinking LED for Suspend-State Indicator When the CPU goes into a suspend state, the chassis power LED will start blinking to indicate that the CPU is in suspend mode. When the user presses any key, the CPU will wake-up and the LED will automatically stop blinking and remain on.
H8QM3-2/H8QMi-2 User’s Manual Power Supply As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates. The H8QM3-2/H8QMi-2 accommodates 12V ATX power supplies. Although most power supplies generally meet the specifi...
Chapter 2: Installation Chapter 2 Installation Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. To prevent dam- age to your system board, it is important to handle it very carefully. The following measures are generally suffi cient to protect your equipment from ESD. Precautions •...
H8QM3-2/H8QMi-2 User's Manual Processor and Heatsink Installation Exercise extreme caution when handling and installing the proces- sor. Always connect the power cord last and always remove it be- fore adding, removing or changing any hardware components. CPU Backplates Four CPU backplates (BKT-0011L) have been preinstalled to the serverboard to prevent the CPU area of the serverboard from bending and to provide a base for attaching the heatsink retention modules.
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Chapter 2: Installation 3. Align pin 1 of the CPU with pin 1 of the socket. Once aligned, carefully place the CPU into the socket. Do not drop the CPU on the socket, move the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket, which may damage the CPU and/or the socket.
H8QM3-2/H8QMi-2 User's Manual Mounting the Serverboard into a Chassis All serverboards have standard mounting holes to fi t different types of chassis. Make sure that the locations of all the mounting holes for both the serverboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the serverboard to the chassis.
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Chapter 2: Installation Support The H8QM3-2/H8QMi-2 supports single or dual-channel, registered ECC DDR2- 800/667/533 SDRAM. Both interleaved and non-interleaved memory are supported, so you may populate any number of DIMM slots (see note on previous page). Populating two adjacent slots at a time with memory modules of the same size and type will result in inter- leaved (128-bit) memory, which is faster than non-interleaved (64-bit) memory.
H8QM3-2/H8QMi-2 User's Manual I/O Port and Control Panel Connections The I/O ports are color coded in conformance with the PC99 specifi cation to make setting up your system easier. See Figure 2-3 below for the colors and locations of the various I/O ports. Figure 2-3.
H8QM3-2/H8QMi-2 User's Manual HDD LED HDD LED The HDD (IDE Hard Disk Drive) LED Pin Defi nitions (JF1) connection is located on pins 13 and Pin# Defi nition 14 of JF1. Attach the IDE hard drive LED cable to display disk activity. HD Active Refer to the table on the right for pin defi...
Chapter 2: Installation Reset Button Reset Button Pin Defi nitions (JF1) The Reset Button connection is lo- Pin# Defi nition cated on pins 3 and 4 of JF1. Attach Reset it to the hardware reset switch on the Ground computer case. Refer to the table on the right for pin defi...
H8QM3-2/H8QMi-2 User's Manual Serial Ports Serial Port Pin Defi nitions (COM1, COM2) The COM1 serial port is located beside Pin # Defi nition Pin # Defi nition the USB ports on the I/O backplane. COM2 is a header located near the SIMLC slot.
Chapter 2: Installation JLAN1/2 (Ethernet Ports) Two Gigabit Ethernet ports (desig- nated JLAN1 and JLAN2) are located beside the COM2 port. These Ethernet ports accept RJ45 type cables. PS/2 Keyboard and Mouse Port Pin ATX PS/2 Keyboard and Defi nitions (J3) PS/2 Mouse Ports Pin# Defi...
H8QM3-2/H8QMi-2 User's Manual Wake-On-Ring The Wake-On-Ring header is desig- Wake-On-Ring nated JWOR. This function allows your Pin Defi nitions (JWOR) computer to receive and "wake-up" by Pin# Defi nition an incoming call to the modem when Ground (Black) in suspend state. See the table on the Wake-up right for pin defi...
Chapter 2: Installation Jumper Settings Explanation of Jumpers To modify the operation of the Connector serverboard, jumpers can be used to Pins choose between optional settings. Jumpers create shorts between two pins to change the function of the Jumper connector. Pin 1 is identifi ed with a square solder pad on the printed circuit board.
H8QM3-2/H8QMi-2 User's Manual VGA Enable/Disable VGA Enable/Disable Jumper Settings (JPG1) JPG1 allows you to enable or disable Jumper Setting Defi nition the VGA port. The default position is Pins 1-2 Enabled on pins 1 and 2 to enable VGA. See Pins 2-3 Disabled the table on the right for jumper set-...
Chapter 2: Installation Watch Dog Enable/Disable JWD controls the Watch Dog function. Watch Dog Jumper Settings (JWD) Watch Dog is a system monitor that can reboot the system when a software Jumper Setting Defi nition application hangs. Pins 1-2 will cause Pins 1-2 Reset WD to reset the system if an applica-...
H8QM3-2/H8QMi-2 User's Manual Flashing IT Firmware 1. Download the appropriate IT fi rmware from the web site: ftp://ftp.supermicro.com/driver/SAS/LSI/Firmware/IT/ 2. Unzip it to a bootable fl oppy or USB pen. 3. With JPS1 on (closed) boot to the device with the unzipped fi rmware and type "clear"...
Chapter 2: Installation Floppy, IDE, SATA and SAS Drive Connections Use the following information to connect the fl oppy and hard disk drive cables. The fl oppy disk drive cable has seven twisted wires. A red mark on a wire typically designates the location of pin 1. A single fl...
H8QM3-2/H8QMi-2 User's Manual IDE Connector IDE Drive Connector Pin Defi nitions (IDE) Pin# Defi nition Pin # Defi nition There are no jumpers to confi g- ure the onboard IDE connector. Reset IDE Ground See the table on the right for Host Data 7 Host Data 8 pin defi...
Chapter 2: Installation SAS Ports SAS Ports Pin Defi nitions There are two SAS ports, one (JSM1/JSM2) located on the backplane and Pin # Defi nition the other on the serverboard Ground near the fl oppy connector. See the table on the right for pin defi...
H8QM3-2/H8QMi-2 User's Manual 2-10 Enabling SATA RAID Note: For SAS RAID, please refer to LSI manual on the driver CD. Serial ATA (SATA) Serial ATA (SATA) is a physical storage interface that employs a single cable with a minimum of four wires to create a point-to-point connection between devices. This connection is a serial link.
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Chapter 2: Installation 2. Use the arrow keys to move to the "Advanced" menu, then scroll down to "nVidia RAID Function" and press the <Enter> key. Use this setting to enable the RAID function. After enabling RAID, use the next setting to enable all drives you wish to include in the RAID array.
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H8QM3-2/H8QMi-2 User's Manual Figure 2-5. SATA RAID Utility: Main Screen Figure 2-6. SATA RAID Utility: Array List 2-22...
Chapter 2: Installation 2-11 Installing Software Drivers After all the hardware and operating system have been installed, you need to install certain drivers. The necessary drivers are all included on the Supermicro CD that came packaged with your serverboard. After inserting this CD into your CD-ROM drive, the display shown in Figure 2-7 should appear.
Chapter 3: Troubleshooting Chapter 3 Troubleshooting Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any hardware components.
H8QM3-2/H8QMi-2 User's Manual NOTE If you are a system integrator, VAR or OEM, a POST diagnostics card is recommended. For I/O port 80h codes, refer to App. B. Memory Errors 1. Make sure that the DIMM modules are properly and fully installed. 2.
Chapter 3: Troubleshooting 3. If you still cannot resolve the problem, include the following information when contacting us for technical support: Serverboard model and PCB revision number BIOS release date/version (this can be seen on the initial display when your system fi...
H8QM3-2/H8QMi-2 User's Manual Question: Why can't I turn off the power using the momentary power on/off switch? Answer: The instant power off function is controlled in BIOS by the Power But- ton Mode setting. When the On/Off feature is enabled, the serverboard will have instant off capabilities as long as the BIOS has control of the system.
Chapter 4: BIOS Chapter 4 BIOS Introduction This chapter describes the AMIBIOS™ Setup utility for the H8QM3-2/H8QMi-2. The AMI ROM BIOS is stored in a fl ash chip and can be easily upgraded using a fl oppy disk-based program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.
H8QM3-2/H8QMi-2 User’s Manual Main Menu When you fi rst enter AMI BIOS Setup Utility, you will see the Main Menu screen. You can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys. The Main Menu screen provides you with a system overview, which includes the version, built date and ID of the AMIBIOS, the type, speed and number of the processors in the system and the amount of memory installed in the system.
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Chapter 4: BIOS Boot up Num-Lock Set this value to allow the Number Lock setting to be modifi ed during boot up. The options are On and Off. PS/2 Mouse Support Set this value to modify support for a PS/2 mouse. The options are Auto, En- abled and Disabled.
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H8QM3-2/H8QMi-2 User’s Manual Headless Mode Use this setting to Enable or Disable headless operation mode through ACPI. MCP55 ACPI HPET Table Use this setting to either Enable or Disable the MCP55 ACPI HPET table. Power Confi guration: Power Button Mode Allows the user to change the function of the power button.
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Chapter 4: BIOS Microcode Update This setting is used to Enable or Disable microcode updates. Secure Virtual Machine Mode This setting is used to Enable or Disable processor-assisted virtualization. Power Now This setting is used to Enable or Disable the AMD Power Now feature. ACPI SRAT Table This setting is used to Enable or Disable the building of an ACPI SRAT table.
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H8QM3-2/H8QMi-2 User’s Manual MB 3½”, and 2.88 MB 3½". Floppy B Move the cursor to these fi elds via up and down <arrow> keys to select the fl oppy type. The options are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3½", 1.44 MB 3½”, and 2.88 MB 3½".
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Chapter 4: BIOS PIO Mode PIO (Programmable I/O) mode programs timing cycles between the IDE drive and the programmable IDE controller. As the PIO mode increases, the cycle time decreases. The options are Auto, 0, 1, 2, 3, and 4. Select Auto to allow AMI BIOS to auto detect the PIO mode.
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H8QM3-2/H8QMi-2 User’s Manual LBA/Large Mode LBA (Logical Block Addressing) is a method of addressing data on a disk drive. The options are Disabled and Auto. Block (Multi-Sector Transfer) Block mode boosts IDE drive performance by increasing the amount of data transferred.
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Chapter 4: BIOS Hard Disk Write Protect Select Enabled to enable the function of Hard Disk Write Protect to prevent data from being written to HDD. The options are Enabled or Disabled. IDE Detect Time Out (Sec) This feature allows the user to set the time-out value for detecting ATA, ATAPI de- vices installed in the system.
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H8QM3-2/H8QMi-2 User’s Manual PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering. Select "Enabled" to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives. The options are Disabled and Enabled. Offboard PCI/ISA IDE Card This option allows the user to assign a PCI slot number to an Off-board PCI/ISA IDE card in order for it to function properly.
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Chapter 4: BIOS Serial Port2 Address This option specifi es the base I/O port address and Interrupt Request address of serial port 2. Select "Disabled" to prevent the serial port from accessing any system resources. When this option is set to "Disabled", the serial port physically becomes unavailable.
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H8QM3-2/H8QMi-2 User’s Manual Chipset Confi guration NorthBridge Confi guration Memory Confi guration Bank Interleaving Select Auto to automatically enable interleaving-memory scheme when this function is supported by the processor. The options are Auto and Disabled. Channel Interleaving Select to enable channel interleaving when this function is supported by the processor.
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Chapter 4: BIOS Power Down Mode This allows you to set the DDR power down mode. Options are Channel and Chip Select. 8-DIMM Drive Strength This option allows you to Enable or Disable the 8-DIMM drive strength. Some memory may have stability issues when all DIMM slots are populated. Enabling this setting may help stabilize such memory issues.
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H8QM3-2/H8QMi-2 User’s Manual L3 Cache BG Scrub Allows L3 cache RAM to be corrected when idle. Options are Disabled and various times in nanoseconds and microseconds. DRAM Timing Confi guration Memory Clock Mode Allows you to choose between Auto, Limit and Manual for the memory clock mode.
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Chapter 4: BIOS USB 1.1 Controller Enable or disable the USB 1.1 controller. USB 2.0 Controller Enable or disable the USB 2.0 controller. USB Devices Enabled This fi eld dsiplays the USB devices currently enabled. Legacy USB Support Select "Enabled" to enable the support for USB Legacy. Disable Legacy support if there are no USB devices installed in the system.
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H8QM3-2/H8QMi-2 User’s Manual Event Log Confi guration View Event Log Highlight this item and press <Enter> to view the contents of the event log. Mark All Events as Read Highlight this item and press <Enter> to mark all events as read. Clear Event Log Select Yes and press <Enter>...
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Chapter 4: BIOS Terminal Type Selects the type of the target terminal: ANSI, VT100 and VT-UTF8. VT-UTF8 Combo Key Support Allows you to Enable or Disable VT-UTF8 combination key support for ANSI/ VT100 terminals. Sredir Memory Display Delay Use this setting to set the delay in seconds to display memory information. Op- tions are No Delay, 1 sec, 2 secs and 4 secs.
H8QM3-2/H8QMi-2 User’s Manual Boot Menu This feature allows the user to confi gure the following items: Boot Device Priority This feature allows the user to prioritize the boot sequence from the available de- vices. The devices to set are: · 1st Boot Device ·...
Chapter 4: BIOS Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen. Save Changes and Exit When you have completed the system confi guration changes, select this option to leave BIOS Setup and reboot the computer, so the new system confi guration parameters can take effect.
Appendix A: BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
Appendix B: BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h. Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution: Checkpoint...
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H8QM3-2/H8QMi-2 User's Manual Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution: Checkpoint Code Description The onboard fl oppy controller if available is initialized. Next, beginning the base 512 KB memory test. Initializing the interrupt vector table next. Initializing the DMA and Interrupt controllers next.
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Appendix B: BIOS POST Checkpoint Codes Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution. These codes are uncompressed in F0000h shadow RAM. Checkpoint Code Description The NMI is disabled. Next, checking for a soft reset or a power on condition. The BIOS stack has been built.
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H8QM3-2/H8QMi-2 User's Manual Checkpoint Code Description Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on. Any initialization before setting video mode will be done next. Initialization before setting the video mode is complete. Confi guring the mono- chrome mode and color mode settings next.
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Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description The memory below 1 MB has been cleared via a soft reset. Clearing the memory above 1 MB next. The memory above 1 MB has been cleared via a soft reset. Saving the memory size next.
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H8QM3-2/H8QMi-2 User's Manual Checkpoint Code Description The password was checked. Performing any required programming before WIN- BIOS Setup next. The programming before WINBIOS Setup has completed. Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next.
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Appendix B: BIOS POST Checkpoint Codes Checkpoint Code Description Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next. Initialization after E000 option ROM control has completed. Displaying the system confi guration next. Uncompressing the DMI data and executing DMI POST initialization next.
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H8QM3-2/H8QMi-2 User's Manual (continued from front) The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency com- munication devices or other critical systems whose failure to perform be reasonably expected to result in signifi...
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