Chipset; Overview; Intel 5500 Chipset Features; Intel Quickpath Interconnect - Dell PowerEdge T410 Technical Manual

Dell

8 Chipset

Overview

8.1
Introduction of the new Intel
5520 and 5500 chipset, which is required to enable the full 5600 series feature set. Dell servers
shipped with the new chipset revision have the symbol II in the System Revision Field visible through
Dell OpenManage™ Server Administrator (OMSA) and the iDRAC GUI. They are physically marked with
a 12 mm x 6 mm rectangular label containing the symbol II. The memory interface is optimized for
800/1066/1333 MT/s DDR3 SDRAM memory with ECC when running with Intel Xeon processor 5600
series.

Intel 5500 Chipset Features

8.2
The following high-level features are supported by the Intel 5500 chipset:
®

Intel 5500 IOH Chipset (north bridge)

Intel QuickPath interconnect: 2 ports

ESI interface: x4 lanes

Intel Virtualization Technology

24 PCIe Gen2 lanes

Riser card (x16 slot + x8 slot) connecting to IOH PCIe x16 Gen 2 and IOH PCIe x4 Gen 2

Integrated Intel

JTAG support

Intel ICH10R Chipset (south bridge)

Integrated USB 2.0 with 12-port capability
o Two back ports from ICH10R
o Two front ports
o Two internal ports from the USB hub (1 port from ICH10R) on the front panel board

Integrated storage controllers

Six SATA channels (through ICH10R)

Maximum of one SATA drive (300MB/s, Gen 2) on each channel
8.2.1

Intel QuickPath Interconnect

Intel QuickPath Interconnect features include:
•
Point-to-point cache-coherent interconnect
•
Fast/narrow unidirectional links
•
Concurrent bi-directional traffic
•
Error detection via CRC
•
Error correction via Link level retry
•
®
Intel Interconnect BIST (Intel IBIST) toolbox built-in
•
Packet-based protocol
8.2.2

PCI Express Interfaces

PCI Express Interfaces include:
•
®
Intel 5500 chipset IOH provides multiple PCI Express Gen 2 interfaces
•
Point-to-point, serial bi-directional interconnect
•
One x4 ESI link to ICH10
PowerEdge T410 Technical Guide
® ®
Xeon processor 5600 series includes a stepping revision of the Intel
®
Management Engine
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