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5.1.4.1.6
Reading Registers
Any register in the status system may be read using the appropriate query command. Some registers clear when read,
others do not. Refer to Paragraph 5.1.4.1.7. The response to a query will be a decimal value that corresponds to the
binary-weighted sum of all bits in the register, Refer to Table 5-1. The actual query commands are described later in
this section.
Position
Decimal
Weighting
Example: If bits 0, 2, and 4 are set, a query of the register will return a decimal value of 21 (1+4+16).
5.1.4.1.7
Programming Registers
The only registers that may be programmed by the user are the enable registers. All other registers in the status system
are read-only registers. To program an enable register send a decimal value which corresponds to the desired binary-
weighted sum of all bits in the register, Refer to Table 5-1. The actual commands are described later in this section.
5.1.4.1.8
Clearing Registers
The methods to clear each register are detailed in Table 5-2.
Register
Condition Registers
Event Registers:
Standard Event Status Register
Operation Event Register
Error Status Event Register
Enable Registers:
Standard Event Status Enable
Register
Operation Event Enable Register
Error Status Enable Register
Service Request Enable Register
Status Byte
Computer Interface Operation
Lake Shore Model 642 Electromagnet Power Supply User's Manual
Table 5-1. Binary Weighting of an 8-Bit Register
B7
B6
B5
128
64
32
7
6
2
2
2
Table 5-2. Register Clear Methods
Method
None – registers are not latched
Query the event register.
Send *CLS
Power on instrument
Write 0 to the enable register.
Power on instrument
There are no commands that directly clear
the Status Byte as the bits are non-
latching. To clear individual summary
bits, clear the event register that
corresponds to the summary bit. Sending
*CLS will clear all event registers which
in turn clears the status byte.
Power on instrument
B4
B3
B2
16
8
4
5
4
3
2
2
2
2
—
*ESR?
(clears Standard Event
Status register)
*CLS
(clears all three registers)
—
*ESE 0
(clears Standard Event
Status Enable register)
—
If bit 5 (ESB) of the Status
Byte is set, send *ESR? to
read the Standard Event
Status Register and bit 5
will clear.
—
B1
B0
2
1
1
0
2
2
Example
5-7
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