Memory Boot Time Deconfiguration; Memory Interchange With Other Systems; System Bus; Bus Bandwidth - IBM pSeries 610 model 6C1 Technical Overview And Introduction

The supported method to install DIMMs is to start at the bottom of each card (card slot J1 and
J2) and then move up.
The system design gives you the flexibility to mix 256 MB and 512 MB SDRAM DIMM
features on the Memory Expansion Kit without affecting performance.

2.2.1 Memory boot time deconfiguration

Memory boot time deconfiguration is a function implemented in the service processor
firmware for removing a memory segment or DIMM from the system configuration at boot
time. The objective is to minimize system failures or data integrity exposure due to faulty
memory hardware. The memory segment or DIMM that is deconfigured remains offline for
subsequent reboots until the faulty memory hardware is replaced. This function provides the
option for the user to manually deconfigure or re-enable a previously deconfigured memory
segment or DIMM using the Service Processor menu.
Memory can also be decreased with AIX using the
benchmark simulations.
Note: Memory cards can physically be removed only when the power is turned off to the
entire system.

2.2.2 Memory interchange with other systems

The 2x256 MB DIMMs (# 4120) or 2x512 MB DIMMs (# 4121) options can be interchanged
with the RS/6000® Models 44P-170, 44P-270, and the IBM ^ pSeries 640 Model
B80.
Note: Interchanging memory with older machines should be subjected to a production
workload in a test environment before putting the system into production.

2.3 System bus

The 6XX bus or system bus is optimized for high-performance and multiprocessing
performance. The bus is fully parity checked and each memory or cache request is range
checked and positively acknowledged for error detection. Any error will cause a machine
check condition and is logged in the AIX error log. The system bus speed is operated at 95.14
MHz with the 333 MHz processor card (2:7 ratio), 93.75 MHz with the 375 MHz processor
card (1:4 ratio), and at 90 MHz with the 450 MHz processor card (1:5 ratio).

2.3.1 Bus bandwidth

The following are the theoretical maximum bandwidths, as applicable for an 2-way 450 MHz
SMP configuration:
Memory bandwidth: 1.44 GB/s
Processor bandwidth: 1.44 GB/s
Bandwidth of the PowerPC® 6xx bus used to the I/O interface: 528 MB/s
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pSeries 610 Models 6C1 and 6E1 Technical Overview and Introduction
command. This is useful for certain