Block Diagrams; System Power Management Block Diagram; Figure 1: System Block Diagram - Wavecom Gx64 Application Note

Power management
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2

Block Diagrams

2.1

System Power Management Block Diagram

The GR/GS64 Wireless CPUs have a number of signals in the system connector that
affect the power state. The signals in Figure 1 show the signals for all types and
variants of the GR/GS64 family of Wireless CPUs.
Table 1 below lists what features are available for the different types and variants.

Figure 1: System Block Diagram

VREF is implemented differently in the two different GR64 variants. VREF is either an
input or an output and are obviously mutually exclusive. Figure 1 only shows VREF as
an output, which is the way it is implemented in the GR64001 and GS64.
The signal can be divided into two types:
The CHG_IN signal is both a PSI and a PSC.
Gx64 APPLICATION NOTE
Power Management
Page: 7/30
Power Supplies and indicators (PSI)
Power state change signals (PSC)
This document is the sole and exclusive property of WAVECOM. Not to be distributed or divulged without prior written agreement.
Ce document est la propriété exclusive de WAVECOM. Il ne peut être communiqué ou divulgué à des tiers sans son autorisation préalable

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