Control Board - Oki OKIPAGE 6e Maintenance Manual

2.1

Control Board

The control board consists of a single chip CPU, Program & Font ROM's, one or two DRAMs, an
EEPROM, a host interface circuit, and a mechanism driving circuit.
(1) Single chip CPU
The single chip CPU is a custom CPU (32-bit internal bus, 16-bit or 32-bit external bus, 25.54
MHz clock with input frequency from a 12.27 MHz clock) which incorporates the RISC CPU
and its peripheral devices, and has the following functions:
Chip select controller
Bus controller
DRAM controller
DMA controller
Parallel interface controller
Video output port
LED STB output port
Timer
Serial I/O port
I/O port
(2) Program & Font ROM
OKIPAGE 6e/6ex
The Program & Font ROM store the PCL5e emulation program and various types of fonts.
Mask ROM is used for a Program & Font ROM. The mounting location of this Program & Font
ROM varies depending on the type of ROM (for the mounting location see 7.2).
PS Board
The Program & Font ROM store the PostScript program and various types of fonts. Mask
ROM is used for a Program & Font ROM (for the mounting location see 7.3).
Built-in device
Control of ROM, DRAM and I/O device
Transfer of image data from DRAM to video output port
Control of Centronics parallel interface
Control of LED head
Generation of various control timing
Monitoring of paper running and paper size
Control of operator panel, EEPROM, and options
Input and output of sensor and motor signals
Function
2 - 4